103 	#include "sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-328.inc"
104 	#include "sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-396.inc"
105 	#include "sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-528.inc"
106 	#include "sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-664.inc"
107 	#include "sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-784.inc"
108 	#include "sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-924.inc"
109 	#include "sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-1056.inc"
797 	else if (dramtype == LPDDR4)  in get_ddr_drv_odt_info()
822 	if (dramtype == LPDDR4) {  in set_lp4_vref()
948 	if (dramtype == LPDDR4 || dramtype == LPDDR4X) {  in set_ds_odt()
963 	} else if (dramtype == LPDDR4 || dramtype == LPDDR4X) {  in set_ds_odt()
1007 	if (dramtype != LPDDR4 && dramtype != LPDDR4X) {  in set_ds_odt()
1041 	if (dramtype == LPDDR4 || dramtype == LPDDR4X) {  in set_ds_odt()
1067 		if (dramtype == LPDDR4 || dramtype == LPDDR4X)  in set_ds_odt()
1083 	if (dramtype == LPDDR4 || dramtype == LPDDR4X)  in set_ds_odt()
1148 	} else {/* for lpddr4 and lpddr4x */  in set_ds_odt()
1231 		dramtype = LPDDR4;  in sdram_cmd_dq_path_remap()
1233 	if (dramtype <= LPDDR4)  in sdram_cmd_dq_path_remap()
1282 	/* lpddr4 odt control by phy, enable cs0 odt */  in phy_cfg()
1283 	if (sdram_params->base.dramtype == LPDDR4 ||  in phy_cfg()
1443 	if ((dramtype == LPDDR4 || dramtype == LPDDR4X) &&  in modify_ca_deskew()
1466 	if (dramtype == LPDDR4 || dramtype == LPDDR4X) {  in modify_ca_deskew()
1582 	if (dramtype != LPDDR4 || dramtype != LPDDR4X) {  in data_training_rg()
1611 	if (dramtype != LPDDR4 || dramtype != LPDDR4X) {  in data_training_rg()
1899 	/* save LPDDR4/LPDDR4X write vref to fsp_param for dfs */  in data_training_wr()
1900 	if (dramtype == LPDDR4 || dramtype == LPDDR4X) {  in data_training_wr()
2106 	if (dramtype == LPDDR4 || dramtype == LPDDR4X) {  in high_freq_training()
2223 	if (sdram_params->base.dramtype == LPDDR4 ||  in update_noc_timing()
2561 	} else if (sdram_params->base.dramtype == LPDDR4 ||  in sdram_init_()
2567 			      LPDDR4);  in sdram_init_()
2571 			      LPDDR4);  in sdram_init_()
2577 			      LPDDR4);  in sdram_init_()
2598 	if (sdram_params->base.dramtype == LPDDR4) {  in sdram_init_()
2599 		mr_tmp = read_mr(dram, 1, 14, LPDDR4);  in sdram_init_()
2605 	if (sdram_params->base.dramtype == LPDDR4 ||  in sdram_init_()
2611 			      LPDDR4);  in sdram_init_()
2651 	if (dram_type != LPDDR4 && dram_type != LPDDR4X) {  in dram_detect_cap()
2694 			printascii("Cap ERR: Fail to get cap of LPDDR4/X from MR8\n");  in dram_detect_cap()
2702 			printascii("RV1126 LPDDR4/X cannot support row >= 17\n");  in dram_detect_cap()
2995 	if (dramtype == LPDDR4 || dramtype == LPDDR4X) {  in pre_set_rate()
3075 	if (sdram_params->base.dramtype == LPDDR4 ||  in save_fsp_param()
3120 	} else if (sdram_params->base.dramtype == LPDDR4 ||  in save_fsp_param()
3241 	case LPDDR4:  in pctl_modify_trfc()
3291 			    dram_type == LPDDR4 || dram_type == LPDDR4X) {  in pctl_modify_trfc()
3479 	} else if (dramtype == LPDDR4 || dramtype == LPDDR4X) {  in ddr_set_rate()