203 	u32 mode_sel = 0;  in phy_io_config()  local
225 			mode_sel = 0x5;  in phy_io_config()
231 			mode_sel = 0x4;  in phy_io_config()
286 		mode_sel = 0x0;  in phy_io_config()
292 		mode_sel = 0x1;  in phy_io_config()
310 	clrsetbits_le32(&denali_phy[924], 0x7 << 15, mode_sel << 15);  in phy_io_config()
312 	clrsetbits_le32(&denali_phy[926], 0x7 << 6, mode_sel << 6);  in phy_io_config()
314 	clrsetbits_le32(&denali_phy[927], 0x7 << 6, mode_sel << 6);  in phy_io_config()
316 	clrsetbits_le32(&denali_phy[928], 0x7 << 14, mode_sel << 14);  in phy_io_config()
318 	clrsetbits_le32(&denali_phy[929], 0x7 << 14, mode_sel << 14);  in phy_io_config()
320 	clrsetbits_le32(&denali_phy[935], 0x7 << 14, mode_sel << 14);  in phy_io_config()
322 	clrsetbits_le32(&denali_phy[937], 0x7 << 14, mode_sel << 14);  in phy_io_config()
324 	clrsetbits_le32(&denali_phy[939], 0x7 << 14, mode_sel << 14);  in phy_io_config()