144 	u32 *denali_ctl = chan->pctl->denali_ctl;  in set_memory_map()  local
164 	clrsetbits_le32(&denali_ctl[191], 0xF, (12 - sdram_ch->cap_info.col));  in set_memory_map()
165 	clrsetbits_le32(&denali_ctl[190], (0x3 << 16) | (0x7 << 24),  in set_memory_map()
169 	clrsetbits_le32(&denali_ctl[196], 0x3 | (1 << 16),  in set_memory_map()
200 	u32 *denali_ctl;  in phy_io_config()  local
213 		denali_ctl = chan->pctl->denali_ctl;  in phy_io_config()
216 		denali_ctl = sdram_params->pctl_regs.denali_ctl;  in phy_io_config()
241 			ds_value = readl(&denali_ctl[138]) & 0xf;  in phy_io_config()
540 	u32 *denali_ctl;  in set_ds_odt()  local
553 		denali_ctl = chan->pctl->denali_ctl;  in set_ds_odt()
556 		denali_ctl = sdram_params->pctl_regs.denali_ctl;  in set_ds_odt()
654 	clrsetbits_le32(&denali_ctl[145], 0xFF << 16,  in set_ds_odt()
657 	clrsetbits_le32(&denali_ctl[146], 0xFF00FF,  in set_ds_odt()
661 	clrsetbits_le32(&denali_ctl[159], 0xFF << 16,  in set_ds_odt()
664 	clrsetbits_le32(&denali_ctl[160], 0xFF00FF,  in set_ds_odt()
780 	u32 *denali_ctl_0 = chan_0->pctl->denali_ctl;  in pctl_start()
782 	u32 *denali_ctl_1 = chan_1->pctl->denali_ctl;  in pctl_start()
898 	u32 *denali_ctl;  in set_lp4_dq_odt()  local
905 		denali_ctl = chan->pctl->denali_ctl;  in set_lp4_dq_odt()
908 		denali_ctl = sdram_params->pctl_regs.denali_ctl;  in set_lp4_dq_odt()
918 		clrsetbits_le32(&denali_ctl[139], 0x7 << 24, reg_value << 24);  in set_lp4_dq_odt()
919 		clrsetbits_le32(&denali_ctl[153], 0x7 << 24, reg_value << 24);  in set_lp4_dq_odt()
927 		clrsetbits_le32(&denali_ctl[140], 0x7 << 0, reg_value << 0);  in set_lp4_dq_odt()
928 		clrsetbits_le32(&denali_ctl[154], 0x7 << 0, reg_value << 0);  in set_lp4_dq_odt()
937 		clrsetbits_le32(&denali_ctl[140], 0x7 << 8, (reg_value << 8));  in set_lp4_dq_odt()
938 		clrsetbits_le32(&denali_ctl[154], 0x7 << 8, (reg_value << 8));  in set_lp4_dq_odt()
957 	u32 *denali_ctl;  in set_lp4_ca_odt()  local
964 		denali_ctl = chan->pctl->denali_ctl;  in set_lp4_ca_odt()
967 		denali_ctl = sdram_params->pctl_regs.denali_ctl;  in set_lp4_ca_odt()
977 		clrsetbits_le32(&denali_ctl[139], 0x7 << 28, reg_value << 28);  in set_lp4_ca_odt()
978 		clrsetbits_le32(&denali_ctl[153], 0x7 << 28, reg_value << 28);  in set_lp4_ca_odt()
986 		clrsetbits_le32(&denali_ctl[140], 0x7 << 4, reg_value << 4);  in set_lp4_ca_odt()
987 		clrsetbits_le32(&denali_ctl[154], 0x7 << 4, reg_value << 4);  in set_lp4_ca_odt()
996 		clrsetbits_le32(&denali_ctl[140], 0x7 << 12, (reg_value << 12));  in set_lp4_ca_odt()
997 		clrsetbits_le32(&denali_ctl[154], 0x7 << 12, (reg_value << 12));  in set_lp4_ca_odt()
1016 	u32 *denali_ctl;  in set_lp4_MR3()  local
1023 		denali_ctl = chan->pctl->denali_ctl;  in set_lp4_MR3()
1026 		denali_ctl = sdram_params->pctl_regs.denali_ctl;  in set_lp4_MR3()
1033 		clrsetbits_le32(&denali_ctl[138], 0xFFFF, reg_value);  in set_lp4_MR3()
1034 		clrsetbits_le32(&denali_ctl[152], 0xFFFF, reg_value);  in set_lp4_MR3()
1042 		clrsetbits_le32(&denali_ctl[138], 0xFFFF << 16,  in set_lp4_MR3()
1044 		clrsetbits_le32(&denali_ctl[152], 0xFFFF << 16,  in set_lp4_MR3()
1054 		clrsetbits_le32(&denali_ctl[139], 0xFFFF, reg_value);  in set_lp4_MR3()
1055 		clrsetbits_le32(&denali_ctl[153], 0xFFFF, reg_value);  in set_lp4_MR3()
1074 	u32 *denali_ctl;  in set_lp4_MR12()  local
1081 		denali_ctl = chan->pctl->denali_ctl;  in set_lp4_MR12()
1084 		denali_ctl = sdram_params->pctl_regs.denali_ctl;  in set_lp4_MR12()
1091 		clrsetbits_le32(&denali_ctl[140], 0xFFFF << 16,  in set_lp4_MR12()
1093 		clrsetbits_le32(&denali_ctl[154], 0xFFFF << 16,  in set_lp4_MR12()
1102 		clrsetbits_le32(&denali_ctl[141], 0xFFFF, reg_value);  in set_lp4_MR12()
1103 		clrsetbits_le32(&denali_ctl[155], 0xFFFF, reg_value);  in set_lp4_MR12()
1112 		clrsetbits_le32(&denali_ctl[141], 0xFFFF << 16,  in set_lp4_MR12()
1114 		clrsetbits_le32(&denali_ctl[155], 0xFFFF << 16,  in set_lp4_MR12()
1134 	u32 *denali_ctl;  in set_lp4_MR14()  local
1141 		denali_ctl = chan->pctl->denali_ctl;  in set_lp4_MR14()
1144 		denali_ctl = sdram_params->pctl_regs.denali_ctl;  in set_lp4_MR14()
1151 		clrsetbits_le32(&denali_ctl[142], 0xFFFF << 16,  in set_lp4_MR14()
1153 		clrsetbits_le32(&denali_ctl[156], 0xFFFF << 16,  in set_lp4_MR14()
1162 		clrsetbits_le32(&denali_ctl[143], 0xFFFF, reg_value);  in set_lp4_MR14()
1163 		clrsetbits_le32(&denali_ctl[157], 0xFFFF, reg_value);  in set_lp4_MR14()
1172 		clrsetbits_le32(&denali_ctl[143], 0xFFFF << 16,  in set_lp4_MR14()
1174 		clrsetbits_le32(&denali_ctl[157], 0xFFFF << 16,  in set_lp4_MR14()
1193 	denali_ctl_params = sdram_params->pctl_regs.denali_ctl;  in modify_param()
1244 	u32 *denali_ctl = chan->pctl->denali_ctl;  in pctl_cfg()  local
1247 	const u32 *params_ctl = sdram_params->pctl_regs.denali_ctl;  in pctl_cfg()
1258 	sdram_copy_to_reg(&denali_ctl[1], &params_ctl[1],  in pctl_cfg()
1260 	writel(params_ctl[0], &denali_ctl[0]);  in pctl_cfg()
1271 		tmp1 = readl(&denali_ctl[14]);  in pctl_cfg()
1272 		writel(tmp + tmp1, &denali_ctl[14]);  in pctl_cfg()
1291 	g_pwrup_srefresh_exit[channel] = readl(&denali_ctl[68]) &  in pctl_cfg()
1293 	clrbits_le32(&denali_ctl[68], PWRUP_SREFRESH_EXIT);  in pctl_cfg()
1299 	setbits_le32(&denali_ctl[0], START);  in pctl_cfg()
1402 	u32 *denali_ctl = chan->pctl->denali_ctl;  in override_write_leveling_value()  local
1426 	clrsetbits_le32(&denali_ctl[200], 0x1 << 8, 0x1 << 8);  in override_write_leveling_value()
1838 			setbits_le32(&dram->chan[channel].pctl->denali_ctl[276],  in dram_all_config()
2111 	u32 *denali_ctl = chan->pctl->denali_ctl;  in set_cap_relate_config()  local
2121 		clrsetbits_le32(&denali_ctl[197], 0x7,  in set_cap_relate_config()
2123 		clrsetbits_le32(&denali_ctl[198], 0x7 << 8,  in set_cap_relate_config()
2163 	u32 *denali_ctl = chan->pctl->denali_ctl;  in dram_set_cs()  local
2167 	clrsetbits_le32(&denali_ctl[196], 0x3, cs_map);  in dram_set_cs()
2187 	u32 *denali_ctl = chan->pctl->denali_ctl;  in dram_set_bw()  local
2190 		clrbits_le32(&denali_ctl[196], 1 << 16);  in dram_set_bw()
2192 		setbits_le32(&denali_ctl[196], 1 << 16);  in dram_set_bw()
2197 	u32 *denali_ctl = chan->pctl->denali_ctl;  in dram_set_max_col()  local
2202 	clrbits_le32(&denali_ctl[191], 0xf);  in dram_set_max_col()
2203 	clrsetbits_le32(&denali_ctl[190],  in dram_set_max_col()
2224 	u32 *denali_ctl = chan->pctl->denali_ctl;  in dram_set_max_bank()  local
2227 	clrbits_le32(&denali_ctl[191], 0xf);  in dram_set_max_bank()
2228 	clrbits_le32(&denali_ctl[190], (3 << 16));  in dram_set_max_bank()
2241 	u32 *denali_ctl = chan->pctl->denali_ctl;  in dram_set_max_row()  local
2245 	clrsetbits_le32(&denali_ctl[191], 0xf, 12 - 10);  in dram_set_max_row()
2246 	clrbits_le32(&denali_ctl[190],  in dram_set_max_row()
2365 			&ddr_pctl_regs->denali_ctl[118]);  in read_mr()
2366 	while (0 == (readl(&ddr_pctl_regs->denali_ctl[203]) &  in read_mr()
2373 	if (!(readl(&ddr_pctl_regs->denali_ctl[203]) & (1 << 12))) {  in read_mr()
2374 		*buf = readl(&ddr_pctl_regs->denali_ctl[119]) & 0xFF;  in read_mr()
2378 		       readl(&ddr_pctl_regs->denali_ctl[17]) & 0x3);  in read_mr()
2381 	setbits_le32(&ddr_pctl_regs->denali_ctl[205], (1 << 21) | (1 << 12));  in read_mr()
2506 	u32 *denali_ctl;  in dram_copy_phy_fn()  local
2513 	denali_ctl = dram->chan[channel].pctl->denali_ctl;  in dram_copy_phy_fn()
2812 			if (((readl(&denali_ctl[217 + ctl_fn]) >>  in dram_copy_phy_fn()
2814 				clrsetbits_le32(&denali_ctl[217 + ctl_fn],  in dram_copy_phy_fn()