Lines Matching refs:pctl_base
223 void __iomem *pctl_base = dram->pctl; in set_ctl_address_map() local
225 sdram_copy_to_reg((u32 *)(pctl_base + DDR_PCTL2_ADDRMAP0), in set_ctl_address_map()
228 setbits_le32(pctl_base + DDR_PCTL2_ADDRMAP6, 1 << 31); in set_ctl_address_map()
230 setbits_le32(pctl_base + DDR_PCTL2_PCCFG, 1 << 8); in set_ctl_address_map()
233 clrsetbits_le32(pctl_base + DDR_PCTL2_ADDRMAP0, 0x1f, 0x1f); in set_ctl_address_map()
238 void __iomem *pctl_base = dram->pctl; in data_training() local
244 pwrctl = readl(pctl_base + DDR_PCTL2_PWRCTL); in data_training()
245 writel(0, pctl_base + DDR_PCTL2_PWRCTL); in data_training()
254 writel(pwrctl, pctl_base + DDR_PCTL2_PWRCTL); in data_training()
325 void __iomem *pctl_base = dram->pctl; in enable_low_power() local
334 clrbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 1)); in enable_low_power()
336 setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 1)); in enable_low_power()
338 clrbits_le32(pctl_base + DDR_PCTL2_PWRCTL, 1); in enable_low_power()
340 setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, 1); in enable_low_power()
341 setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 3)); in enable_low_power()
348 void __iomem *pctl_base = dram->pctl; in sdram_init() local
373 setbits_le32(pctl_base + DDR_PCTL2_DFIMISC, (1 << 5) | (1 << 4)); in sdram_init()
376 while ((readl(pctl_base + DDR_PCTL2_STAT) & 0x7) == 0) in sdram_init()