67 static void rkclk_ddr_reset(struct dram_info *dram,  in rkclk_ddr_reset()  argument
73 		&dram->cru->softrst_con[5]);  in rkclk_ddr_reset()
74 	writel(ddrctrl_asrstn_req(ctl_srstn), &dram->cru->softrst_con[9]);  in rkclk_ddr_reset()
77 static void rkclk_set_dpll(struct dram_info *dram, unsigned int hz)  in rkclk_set_dpll()  argument
105 	writel(((0x1 << 4) << 16) | (0 << 4), &dram->cru->mode_con);  in rkclk_set_dpll()
106 	writel(POSTDIV1(postdiv1) | FBDIV(fbdiv), &dram->cru->dpll_con[0]);  in rkclk_set_dpll()
108 	       &dram->cru->dpll_con[1]);  in rkclk_set_dpll()
112 		if (LOCK(readl(&dram->cru->dpll_con[1])))  in rkclk_set_dpll()
117 	writel(((0x1 << 4) << 16) | (1 << 4), &dram->cru->mode_con);  in rkclk_set_dpll()
120 static void rkclk_configure_ddr(struct dram_info *dram,  in rkclk_configure_ddr()  argument
123 	void __iomem *phy_base = dram->phy;  in rkclk_configure_ddr()
129 	rkclk_set_dpll(dram,  sdram_params->base.ddr_freq * MHZ * 2);  in rkclk_configure_ddr()
215  * calculate controller dram address map, and setting to register.
219 static void set_ctl_address_map(struct dram_info *dram,  in set_ctl_address_map()  argument
223 	void __iomem *pctl_base = dram->pctl;  in set_ctl_address_map()
236 static int data_training(struct dram_info *dram, u32 cs, u32 dramtype)  in data_training()  argument
238 	void __iomem *pctl_base = dram->pctl;  in data_training()
247 	dis_auto_zq = pctl_dis_zqcs_aref(dram->pctl);  in data_training()
249 	ret = phy_data_training(dram->phy, cs, dramtype);  in data_training()
251 	pctl_rest_zqcs_aref(dram->pctl, dis_auto_zq);  in data_training()
259 static void rx_deskew_switch_adjust(struct dram_info *dram)  in rx_deskew_switch_adjust()  argument
263 	void __iomem *phy_base = dram->phy;  in rx_deskew_switch_adjust()
275 static void tx_deskew_switch_adjust(struct dram_info *dram)  in tx_deskew_switch_adjust()  argument
277 	void __iomem *phy_base = dram->phy;  in tx_deskew_switch_adjust()
282 static void set_ddrconfig(struct dram_info *dram, u32 ddrconfig)  in set_ddrconfig()  argument
284 	writel(ddrconfig, &dram->msch->ddrconf);  in set_ddrconfig()
306 static void dram_all_config(struct dram_info *dram,  in dram_all_config()  argument
313 	set_ddrconfig(dram, cap_info->ddrconfig);  in dram_all_config()
316 	writel(sys_reg2, &dram->grf->os_reg[2]);  in dram_all_config()
317 	writel(sys_reg3, &dram->grf->os_reg[3]);  in dram_all_config()
319 	sdram_msch_config(dram->msch, &sdram_ch.noc_timings);  in dram_all_config()
322 static void enable_low_power(struct dram_info *dram,  in enable_low_power()  argument
325 	void __iomem *pctl_base = dram->pctl;  in enable_low_power()
328 	writel(0x00800000, &dram->ddr_grf->ddr_grf_con[0]);  in enable_low_power()
329 	writel(0x20012001, &dram->ddr_grf->ddr_grf_con[2]);  in enable_low_power()
331 	writel(0x001e001a, &dram->ddr_grf->ddr_grf_con[2]);  in enable_low_power()
344 static int sdram_init(struct dram_info *dram,  in sdram_init()  argument
348 	void __iomem *pctl_base = dram->pctl;  in sdram_init()
350 	rkclk_ddr_reset(dram, 1, 1, 1, 1);  in sdram_init()
357 	rkclk_ddr_reset(dram, 1, 1, 1, 0);  in sdram_init()
358 	rkclk_configure_ddr(dram, sdram_params);  in sdram_init()
361 	rkclk_ddr_reset(dram, 1, 1, 0, 0);  in sdram_init()
363 	phy_soft_reset(dram->phy);  in sdram_init()
365 	rkclk_ddr_reset(dram, 1, 0, 0, 0);  in sdram_init()
366 	pctl_cfg(dram->pctl, &sdram_params->pctl_regs, SR_IDLE, PD_IDLE);  in sdram_init()
368 	set_ctl_address_map(dram, sdram_params);  in sdram_init()
369 	phy_cfg(dram->phy, &sdram_params->phy_regs, &sdram_params->skew,  in sdram_init()
374 	rkclk_ddr_reset(dram, 0, 0, 0, 0);  in sdram_init()
375 	/* wait for dfi_init_done and dram init complete */  in sdram_init()
380 	if (data_training(dram, 0, sdram_params->base.dramtype) != 0) {  in sdram_init()
384 	if (data_training(dram, 1, sdram_params->base.dramtype) != 0) {  in sdram_init()
390 		pctl_write_vrefdq(dram->pctl, 0x3, 5670,  in sdram_init()
394 		rx_deskew_switch_adjust(dram);  in sdram_init()
395 		tx_deskew_switch_adjust(dram);  in sdram_init()
398 	dram_all_config(dram, sdram_params);  in sdram_init()
399 	enable_low_power(dram, sdram_params);  in sdram_init()
404 static u64 dram_detect_cap(struct dram_info *dram,  in dram_detect_cap()  argument
454 	if (data_training(dram, 1, dram_type) == 0)  in dram_detect_cap()
477 static int sdram_init_detect(struct dram_info *dram,  in sdram_init_detect()  argument
489 	sdram_init(dram, sdram_params, 1);  in sdram_init_detect()
490 	dram_detect_cap(dram, sdram_params, 0);  in sdram_init_detect()
501 	/* reinit sdram by real dram cap */  in sdram_init_detect()
502 	sdram_init(dram, sdram_params, 0);  in sdram_init_detect()
507 		sys_reg = readl(&dram->grf->os_reg[2]);  in sdram_init_detect()
508 		sys_reg3 = readl(&dram->grf->os_reg[3]);  in sdram_init_detect()
511 		writel(sys_reg, &dram->grf->os_reg[2]);  in sdram_init_detect()
512 		writel(sys_reg3, &dram->grf->os_reg[3]);  in sdram_init_detect()
550 		printf("%s DRAM init failed%d\n", __func__, ret);  in rk3328_dmc_init()