Lines Matching refs:t_serial

613 	struct tag_serial t_serial;  in ddr_set_atags()  local
615 memset(&t_serial, 0, sizeof(struct tag_serial)); in ddr_set_atags()
619 t_serial.version = 0; in ddr_set_atags()
622 t_serial.enable = 0; in ddr_set_atags()
624 t_serial.enable = 1; in ddr_set_atags()
625 t_serial.baudrate = UART_INFO_BAUD(uart_info); in ddr_set_atags()
626 t_serial.m_mode = UART_INFO_IOMUX(uart_info); in ddr_set_atags()
627 t_serial.id = UART_INFO_ID(uart_info); in ddr_set_atags()
629 t_serial.addr = UART0_BASE; in ddr_set_atags()
631 t_serial.addr = UART1_BASE; in ddr_set_atags()
633 t_serial.addr = UART2_BASE; in ddr_set_atags()
635 t_serial.addr = UART3_BASE; in ddr_set_atags()
637 t_serial.addr = UART4_BASE; in ddr_set_atags()
642 t_serial.version = 0; in ddr_set_atags()
643 t_serial.enable = 1; in ddr_set_atags()
644 t_serial.addr = CONFIG_DEBUG_UART_BASE; in ddr_set_atags()
645 t_serial.baudrate = CONFIG_BAUDRATE; in ddr_set_atags()
649 t_serial.m_mode = SERIAL_M_MODE_M0; in ddr_set_atags()
650 t_serial.id = 0; in ddr_set_atags()
653 t_serial.m_mode = SERIAL_M_MODE_M0; in ddr_set_atags()
654 t_serial.id = 1; in ddr_set_atags()
657 t_serial.m_mode = SERIAL_M_MODE_M0; in ddr_set_atags()
660 t_serial.m_mode = SERIAL_M_MODE_M1; in ddr_set_atags()
664 t_serial.id = 2; in ddr_set_atags()
667 t_serial.m_mode = SERIAL_M_MODE_M0; in ddr_set_atags()
668 t_serial.id = 3; in ddr_set_atags()
671 t_serial.m_mode = SERIAL_M_MODE_M0; in ddr_set_atags()
672 t_serial.id = 4; in ddr_set_atags()
682 atags_set_tag(ATAG_SERIAL, &t_serial); in ddr_set_atags()