70 	rk_clrsetreg(&priv->pmu->sft_con_lo, DDR_IO_RET_CFG_MASK,  in enable_ddr_io_ret()
73 	rk_clrsetreg(&priv->grf->upctl_con0, GRF_DDR_16BIT_EN_MASK,  in enable_ddr_io_ret()
81 	rk_clrsetreg(&priv->cru->pll[pll_type].con1, PLLPD0_MASK,  in pll_set()
83 	rk_clrsetreg(&priv->cru->pll[pll_type].con1,  in pll_set()
87 	rk_clrsetreg(&priv->cru->pll[pll_type].con0,  in pll_set()
91 	rk_clrsetreg(&priv->cru->pll[pll_type].con1,  in pll_set()
98 	rk_clrsetreg(&priv->cru->pll[pll_type].con1, PLLPD0_MASK,  in pll_set()
116 	rk_clrsetreg(&priv->cru->mode, VPLL1_WORK_MODE_MASK,  in rkdclk_init()
118 	rk_clrsetreg(&priv->cru->mode, VPLL0_WORK_MODE_MASK,  in rkdclk_init()
120 	rk_clrsetreg(&priv->cru->mode, DPLL_WORK_MODE_MASK,  in rkdclk_init()
124 	rk_clrsetreg(&priv->cru->mode, VPLL1_CLK_SEL_MASK,  in rkdclk_init()
126 	rk_clrsetreg(&priv->cru->mode, VPLL0_CLK_SEL_MASK,  in rkdclk_init()
128 	rk_clrsetreg(&priv->cru->mode, DPLL_CLK_SEL_MASK,  in rkdclk_init()
205 	rk_clrsetreg(&priv->cru->clksel_con[1],  in rkdclk_init()
211 	rk_clrsetreg(&priv->cru->clksel_con[5],  in rkdclk_init()
216 	rk_clrsetreg(&priv->cru->clksel_con[6],  in rkdclk_init()
221 	rk_clrsetreg(&priv->cru->clksel_con[7],  in rkdclk_init()
229 	rk_clrsetreg(&priv->cru->clksel_con[36],  in rkdclk_init()
234 	rk_clrsetreg(&priv->cru->clksel_con[37],  in rkdclk_init()
239 	rk_clrsetreg(&priv->cru->clksel_con[38],  in rkdclk_init()
245 	rk_clrsetreg(&priv->cru->clksel_con[39],  in rkdclk_init()
251 	rk_clrsetreg(&priv->cru->clksel_con[41],  in rkdclk_init()
257 	rk_clrsetreg(&priv->cru->clksel_con[42],  in rkdclk_init()
273 	rk_clrsetreg(&priv->cru->clksel_con[5],  in rkdclk_init()
278 	rk_clrsetreg(&priv->cru->clksel_con[6],  in rkdclk_init()
283 	rk_clrsetreg(&priv->cru->clksel_con[7],  in rkdclk_init()
291 	rk_clrsetreg(&priv->cru->clksel_con[36],  in rkdclk_init()
296 	rk_clrsetreg(&priv->cru->clksel_con[37],  in rkdclk_init()
301 	rk_clrsetreg(&priv->cru->clksel_con[38],  in rkdclk_init()
307 	rk_clrsetreg(&priv->cru->clksel_con[39],  in rkdclk_init()
313 	rk_clrsetreg(&priv->cru->clksel_con[41],  in rkdclk_init()
319 	rk_clrsetreg(&priv->cru->clksel_con[42],  in rkdclk_init()
336 	rk_clrsetreg(&priv->cru->clksel_con[5],  in rkdclk_init()
341 	rk_clrsetreg(&priv->cru->clksel_con[6],  in rkdclk_init()
346 	rk_clrsetreg(&priv->cru->clksel_con[7],  in rkdclk_init()
354 	rk_clrsetreg(&priv->cru->clksel_con[36],  in rkdclk_init()
359 	rk_clrsetreg(&priv->cru->clksel_con[37],  in rkdclk_init()
364 	rk_clrsetreg(&priv->cru->clksel_con[38],  in rkdclk_init()
371 	rk_clrsetreg(&priv->cru->clksel_con[39],  in rkdclk_init()
377 	rk_clrsetreg(&priv->cru->clksel_con[41],  in rkdclk_init()
383 	rk_clrsetreg(&priv->cru->clksel_con[42],  in rkdclk_init()
390 	rk_clrsetreg(&priv->cru->clksel_con[48],  in rkdclk_init()
398 	rk_clrsetreg(&priv->cru->clksel_con[10],  in rkdclk_init()
401 	rk_clrsetreg(&priv->cru->clksel_con[13],  in rkdclk_init()
404 	rk_clrsetreg(&priv->cru->clksel_con[16],  in rkdclk_init()
407 	rk_clrsetreg(&priv->cru->clksel_con[19],  in rkdclk_init()
410 	rk_clrsetreg(&priv->cru->clksel_con[22],  in rkdclk_init()
415 	rk_clrsetreg(&priv->cru->mode, VPLL1_WORK_MODE_MASK,  in rkdclk_init()
417 	rk_clrsetreg(&priv->cru->mode, VPLL0_WORK_MODE_MASK,  in rkdclk_init()
419 	rk_clrsetreg(&priv->cru->mode, DPLL_WORK_MODE_MASK,  in rkdclk_init()
425 	rk_clrsetreg(&priv->cru->softrst_con[1],  in phy_pctrl_reset_cru()
436 	rk_clrsetreg(&priv->cru->softrst_con[1],  in phy_pctrl_reset_cru()
444 	rk_clrsetreg(&priv->cru->softrst_con[1],  in phy_pctrl_reset_cru()
456 		rk_clrsetreg(&priv->grf->soc_con12, NOC_MSCH_MAINDDR3_MASK,  in pctl_cfg_grf()
459 		rk_clrsetreg(&priv->grf->soc_con12, NOC_MSCH_MAINDDR3_MASK,  in pctl_cfg_grf()
583 	rk_clrsetreg(&priv->grf->upctl_con0, CYSYREQ_UPCTL_DDRSTDBY_MASK,  in enable_ddr_standby()