535 static void dram_all_config(const struct dram_info *dram,  in dram_all_config()  argument
557 		dram_cfg_rbc(&dram->chan[chan], chan, sdram_params);  in dram_all_config()
560 		ddr_rank_2_row15en(dram->grf, 0);  in dram_all_config()
562 		ddr_rank_2_row15en(dram->grf, 1);  in dram_all_config()
564 	writel(sys_reg, &dram->pmu->sys_reg[2]);  in dram_all_config()
567 static int sdram_rank_bw_detect(struct dram_info *dram, int channel,  in sdram_rank_bw_detect()  argument
572 	const struct chan_info *chan = &dram->chan[channel];  in sdram_rank_bw_detect()
575 	ddr_rank_2_row15en(dram->grf, 0);  in sdram_rank_bw_detect()
598 					    dram->grf);  in sdram_rank_bw_detect()
608 			ddr_phy_ctl_reset(dram->cru, channel, 1);  in sdram_rank_bw_detect()
610 			ddr_phy_ctl_reset(dram->cru, channel, 0);  in sdram_rank_bw_detect()
628 static int sdram_col_row_detect(struct dram_info *dram, int channel,  in sdram_col_row_detect()  argument
633 	const struct chan_info *chan = &dram->chan[channel];  in sdram_col_row_detect()
656 	ddr_rank_2_row15en(dram->grf, 1);  in sdram_col_row_detect()
712 static int sdram_init(struct dram_info *dram,  in sdram_init()  argument
725 	ret = clk_set_rate(&dram->ddr_clk, sdram_params->base.ddr_freq);  in sdram_init()
732 		const struct chan_info *chan = &dram->chan[channel];  in sdram_init()
736 		phy_pctrl_reset(dram->cru, publ, channel);  in sdram_init()
741 		pctl_cfg(channel, pctl, sdram_params, dram->grf);  in sdram_init()
757 				    sdram_params->ch[channel].bw, dram->grf);  in sdram_init()
777 		sdram_rank_bw_detect(dram, channel, sdram_params);  in sdram_init()
790 		ret = sdram_col_row_detect(dram, channel, sdram_params);  in sdram_init()
799 	dram_all_config(dram, sdram_params);  in sdram_init()