121 u16 uec_phy_read(struct uec_mii_info *mii_info, u16 regnum);
242 	adv = uec_phy_read(mii_info, MII_ADVERTISE);  in config_genmii_advert()
260 	ctrl = uec_phy_read(mii_info, MII_BMCR);  in genmii_setup_forced()
298 	ctl = uec_phy_read(mii_info, MII_BMCR);  in genmii_restart_aneg()
313 		adv = uec_phy_read(mii_info, MII_CTRL1000);  in gbit_config_aneg()
373 	uec_phy_read(mii_info, MII_BMSR);  in genmii_update_link()
379 	status = uec_phy_read(mii_info, MII_BMSR);  in genmii_update_link()
395 			status = uec_phy_read(mii_info, MII_BMSR);  in genmii_update_link()
420 		status = uec_phy_read(mii_info, MII_STAT1000);  in genmii_read_status()
429 			status = uec_phy_read(mii_info, MII_LPA);  in genmii_read_status()
464 			val = uec_phy_read(mii_info, MII_BMSR);  in bcm_init()
470 		val = uec_phy_read(mii_info, 0x18);  in bcm_init()
495 		temp = uec_phy_read(mii_info, MII_M1111_PHY_EXT_CR);  in uec_marvell_init()
507 		temp = uec_phy_read(mii_info, MII_M1111_PHY_EXT_SR);  in uec_marvell_init()
535 		status = uec_phy_read(mii_info, MII_M1011_PHY_SPEC_STATUS);  in marvell_read_status()
565 	uec_phy_read(mii_info, MII_M1011_IEVENT);  in marvell_ack_interrupt()
584 	uec_phy_write(mii_info, MII_BMCR, uec_phy_read(mii_info, MII_BMCR) |  in dm9161_init()
587 	uec_phy_write(mii_info, MII_BMCR, uec_phy_read(mii_info, MII_BMCR) &  in dm9161_init()
616 		status = uec_phy_read(mii_info, MII_DM9161_SCSR);  in dm9161_read_status()
634 	uec_phy_read(mii_info, MII_DM9161_INTR);  in dm9161_ack_interrupt()
698 		status = uec_phy_read(mii_info, 0x1f);  in smsc_read_status()
806 u16 uec_phy_read(struct uec_mii_info *mii_info, u16 regnum)  in uec_phy_read()  function
827 	phy_reg = uec_phy_read(mii_info, MII_PHYSID1);  in uec_get_phy_info()
831 	phy_reg = uec_phy_read(mii_info, MII_PHYSID2);  in uec_get_phy_info()
900 		status = uec_phy_read(mii_info, MII_BMCR);  in marvell_phy_interface_mode()