Lines Matching +full:reg +full:- +full:data
1 // SPDX-License-Identifier: GPL-2.0+
12 #include "pinctrl-rockchip.h"
16 struct rockchip_pinctrl_priv *priv = bank->priv; in rv1106_set_mux()
19 int reg, ret, mask; in rv1106_set_mux() local
21 u32 data; in rv1106_set_mux() local
23 debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux); in rv1106_set_mux()
25 if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) in rv1106_set_mux()
26 regmap = priv->regmap_pmu; in rv1106_set_mux()
28 regmap = priv->regmap_base; in rv1106_set_mux()
30 reg = bank->iomux[iomux_num].offset; in rv1106_set_mux()
32 reg += 0x4; in rv1106_set_mux()
36 data = (mask << (bit + 16)); in rv1106_set_mux()
37 data |= (mux & mask) << bit; in rv1106_set_mux()
39 debug("iomux write reg = %x data = %x\n", reg, data); in rv1106_set_mux()
41 ret = regmap_write(regmap, reg, data); in rv1106_set_mux()
56 int *reg, u8 *bit) in rv1106_calc_drv_reg_and_bit() argument
58 struct rockchip_pinctrl_priv *priv = bank->priv; in rv1106_calc_drv_reg_and_bit()
61 switch (bank->bank_num) { in rv1106_calc_drv_reg_and_bit()
63 *regmap = priv->regmap_pmu; in rv1106_calc_drv_reg_and_bit()
64 *reg = RV1106_DRV_GPIO0_OFFSET; in rv1106_calc_drv_reg_and_bit()
68 *regmap = priv->regmap_base; in rv1106_calc_drv_reg_and_bit()
69 *reg = RV1106_DRV_GPIO1_OFFSET; in rv1106_calc_drv_reg_and_bit()
73 *regmap = priv->regmap_base; in rv1106_calc_drv_reg_and_bit()
74 *reg = RV1106_DRV_GPIO2_OFFSET; in rv1106_calc_drv_reg_and_bit()
78 *regmap = priv->regmap_base; in rv1106_calc_drv_reg_and_bit()
79 *reg = RV1106_DRV_GPIO3_OFFSET; in rv1106_calc_drv_reg_and_bit()
83 *regmap = priv->regmap_base; in rv1106_calc_drv_reg_and_bit()
84 *reg = RV1106_DRV_GPIO4_OFFSET; in rv1106_calc_drv_reg_and_bit()
88 *regmap = priv->regmap_base; in rv1106_calc_drv_reg_and_bit()
89 *reg = 0; in rv1106_calc_drv_reg_and_bit()
90 dev_err(priv->dev, "unsupported bank_num %d\n", bank->bank_num); in rv1106_calc_drv_reg_and_bit()
94 *reg += ((pin_num / RV1106_DRV_PINS_PER_REG) * 4); in rv1106_calc_drv_reg_and_bit()
103 int reg, ret; in rv1106_set_drive() local
104 u32 data; in rv1106_set_drive() local
106 int drv = (1 << (strength + 1)) - 1; in rv1106_set_drive()
108 rv1106_calc_drv_reg_and_bit(bank, pin_num, ®map, ®, &bit); in rv1106_set_drive()
111 data = ((1 << RV1106_DRV_BITS_PER_PIN) - 1) << (bit + 16); in rv1106_set_drive()
112 data |= (drv << bit); in rv1106_set_drive()
113 ret = regmap_write(regmap, reg, data); in rv1106_set_drive()
128 int *reg, u8 *bit) in rv1106_calc_pull_reg_and_bit() argument
130 struct rockchip_pinctrl_priv *priv = bank->priv; in rv1106_calc_pull_reg_and_bit()
133 switch (bank->bank_num) { in rv1106_calc_pull_reg_and_bit()
135 *regmap = priv->regmap_pmu; in rv1106_calc_pull_reg_and_bit()
136 *reg = RV1106_PULL_GPIO0_OFFSET; in rv1106_calc_pull_reg_and_bit()
140 *regmap = priv->regmap_base; in rv1106_calc_pull_reg_and_bit()
141 *reg = RV1106_PULL_GPIO1_OFFSET; in rv1106_calc_pull_reg_and_bit()
145 *regmap = priv->regmap_base; in rv1106_calc_pull_reg_and_bit()
146 *reg = RV1106_PULL_GPIO2_OFFSET; in rv1106_calc_pull_reg_and_bit()
150 *regmap = priv->regmap_base; in rv1106_calc_pull_reg_and_bit()
151 *reg = RV1106_PULL_GPIO3_OFFSET; in rv1106_calc_pull_reg_and_bit()
155 *regmap = priv->regmap_base; in rv1106_calc_pull_reg_and_bit()
156 *reg = RV1106_PULL_GPIO4_OFFSET; in rv1106_calc_pull_reg_and_bit()
160 *regmap = priv->regmap_base; in rv1106_calc_pull_reg_and_bit()
161 *reg = 0; in rv1106_calc_pull_reg_and_bit()
162 dev_err(priv->dev, "unsupported bank_num %d\n", bank->bank_num); in rv1106_calc_pull_reg_and_bit()
166 *reg += ((pin_num / RV1106_PULL_PINS_PER_REG) * 4); in rv1106_calc_pull_reg_and_bit()
175 int reg, ret; in rv1106_set_pull() local
177 u32 data; in rv1106_set_pull() local
180 return -ENOTSUPP; in rv1106_set_pull()
182 rv1106_calc_pull_reg_and_bit(bank, pin_num, ®map, ®, &bit); in rv1106_set_pull()
183 type = bank->pull_type[pin_num / 8]; in rv1106_set_pull()
191 data = ((1 << RV1106_PULL_BITS_PER_PIN) - 1) << (bit + 16); in rv1106_set_pull()
193 data |= (ret << bit); in rv1106_set_pull()
194 ret = regmap_write(regmap, reg, data); in rv1106_set_pull()
210 int *reg, u8 *bit) in rv1106_calc_schmitt_reg_and_bit() argument
212 struct rockchip_pinctrl_priv *priv = bank->priv; in rv1106_calc_schmitt_reg_and_bit()
215 switch (bank->bank_num) { in rv1106_calc_schmitt_reg_and_bit()
217 *regmap = priv->regmap_pmu; in rv1106_calc_schmitt_reg_and_bit()
218 *reg = RV1106_SMT_GPIO0_OFFSET; in rv1106_calc_schmitt_reg_and_bit()
222 *regmap = priv->regmap_base; in rv1106_calc_schmitt_reg_and_bit()
223 *reg = RV1106_SMT_GPIO1_OFFSET; in rv1106_calc_schmitt_reg_and_bit()
227 *regmap = priv->regmap_base; in rv1106_calc_schmitt_reg_and_bit()
228 *reg = RV1106_SMT_GPIO2_OFFSET; in rv1106_calc_schmitt_reg_and_bit()
232 *regmap = priv->regmap_base; in rv1106_calc_schmitt_reg_and_bit()
233 *reg = RV1106_SMT_GPIO3_OFFSET; in rv1106_calc_schmitt_reg_and_bit()
237 *regmap = priv->regmap_base; in rv1106_calc_schmitt_reg_and_bit()
238 *reg = RV1106_SMT_GPIO4_OFFSET; in rv1106_calc_schmitt_reg_and_bit()
242 *regmap = priv->regmap_base; in rv1106_calc_schmitt_reg_and_bit()
243 *reg = 0; in rv1106_calc_schmitt_reg_and_bit()
244 dev_err(priv->dev, "unsupported bank_num %d\n", bank->bank_num); in rv1106_calc_schmitt_reg_and_bit()
248 *reg += ((pin_num / RV1106_SMT_PINS_PER_REG) * 4); in rv1106_calc_schmitt_reg_and_bit()
259 int reg, ret; in rv1106_set_schmitt() local
260 u32 data; in rv1106_set_schmitt() local
263 rv1106_calc_schmitt_reg_and_bit(bank, pin_num, ®map, ®, &bit); in rv1106_set_schmitt()
266 data = ((1 << RV1106_SMT_BITS_PER_PIN) - 1) << (bit + 16); in rv1106_set_schmitt()
267 data |= (enable << bit); in rv1106_set_schmitt()
268 ret = regmap_write(regmap, reg, data); in rv1106_set_schmitt()
319 .compatible = "rockchip,rv1106-pinctrl",
320 .data = (ulong)&rv1106_pin_ctrl