Lines Matching +full:reg +full:- +full:mux
1 // SPDX-License-Identifier: GPL-2.0+
12 #include "pinctrl-rockchip.h"
15 …MR_TOPGRF(RK_GPIO0, RK_PB3, RK_FUNC_2, 0x0300, RK_GENMASK_VAL(0, 0, 0)), /* CAN0 IO mux selection …
16 …MR_TOPGRF(RK_GPIO2, RK_PA1, RK_FUNC_4, 0x0300, RK_GENMASK_VAL(0, 0, 1)), /* CAN0 IO mux selection …
17 …MR_TOPGRF(RK_GPIO1, RK_PA1, RK_FUNC_3, 0x0300, RK_GENMASK_VAL(2, 2, 0)), /* CAN1 IO mux selection …
18 …MR_TOPGRF(RK_GPIO4, RK_PC3, RK_FUNC_3, 0x0300, RK_GENMASK_VAL(2, 2, 1)), /* CAN1 IO mux selection …
19 …MR_TOPGRF(RK_GPIO4, RK_PB5, RK_FUNC_3, 0x0300, RK_GENMASK_VAL(4, 4, 0)), /* CAN2 IO mux selection …
20 …MR_TOPGRF(RK_GPIO2, RK_PB2, RK_FUNC_4, 0x0300, RK_GENMASK_VAL(4, 4, 1)), /* CAN2 IO mux selection …
21 …MR_TOPGRF(RK_GPIO4, RK_PC4, RK_FUNC_1, 0x0300, RK_GENMASK_VAL(6, 6, 0)), /* EDPDP_HPDIN IO mux sel…
22 …MR_TOPGRF(RK_GPIO0, RK_PC2, RK_FUNC_2, 0x0300, RK_GENMASK_VAL(6, 6, 1)), /* EDPDP_HPDIN IO mux sel…
23 …MR_TOPGRF(RK_GPIO3, RK_PB1, RK_FUNC_3, 0x0300, RK_GENMASK_VAL(8, 8, 0)), /* GMAC1 IO mux selection…
24 …MR_TOPGRF(RK_GPIO4, RK_PA7, RK_FUNC_3, 0x0300, RK_GENMASK_VAL(8, 8, 1)), /* GMAC1 IO mux selection…
25 …MR_TOPGRF(RK_GPIO4, RK_PD1, RK_FUNC_1, 0x0300, RK_GENMASK_VAL(10, 10, 0)), /* HDMITX IO mux select…
26 …MR_TOPGRF(RK_GPIO0, RK_PC7, RK_FUNC_1, 0x0300, RK_GENMASK_VAL(10, 10, 1)), /* HDMITX IO mux select…
27 …MR_TOPGRF(RK_GPIO0, RK_PB6, RK_FUNC_1, 0x0300, RK_GENMASK_VAL(14, 14, 0)), /* I2C2 IO mux selectio…
28 …MR_TOPGRF(RK_GPIO4, RK_PB4, RK_FUNC_1, 0x0300, RK_GENMASK_VAL(14, 14, 1)), /* I2C2 IO mux selectio…
29 …MR_TOPGRF(RK_GPIO1, RK_PA0, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(0, 0, 0)), /* I2C3 IO mux selection …
30 …MR_TOPGRF(RK_GPIO3, RK_PB6, RK_FUNC_4, 0x0304, RK_GENMASK_VAL(0, 0, 1)), /* I2C3 IO mux selection …
31 …MR_TOPGRF(RK_GPIO4, RK_PB2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(2, 2, 0)), /* I2C4 IO mux selection …
32 …MR_TOPGRF(RK_GPIO2, RK_PB1, RK_FUNC_2, 0x0304, RK_GENMASK_VAL(2, 2, 1)), /* I2C4 IO mux selection …
33 …MR_TOPGRF(RK_GPIO3, RK_PB4, RK_FUNC_4, 0x0304, RK_GENMASK_VAL(4, 4, 0)), /* I2C5 IO mux selection …
34 …MR_TOPGRF(RK_GPIO4, RK_PD0, RK_FUNC_2, 0x0304, RK_GENMASK_VAL(4, 4, 1)), /* I2C5 IO mux selection …
35 …MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(6, 6, 0)), /* PWM4 IO mux selection …
36 …MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(6, 6, 1)), /* PWM4 IO mux selection …
37 …MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(8, 8, 0)), /* PWM5 IO mux selection …
38 …MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(8, 8, 1)), /* PWM5 IO mux selection …
39 …MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(10, 10, 0)), /* PWM6 IO mux selectio…
40 …MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(10, 10, 1)), /* PWM6 IO mux selectio…
41 …MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(12, 12, 0)), /* PWM7 IO mux selectio…
42 …MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(12, 12, 1)), /* PWM7 IO mux selectio…
43 …MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(14, 14, 0)), /* PWM8 IO mux selectio…
44 …MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(14, 14, 1)), /* PWM8 IO mux selectio…
45 …MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(0, 0, 0)), /* PWM9 IO mux selection …
46 …MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(0, 0, 1)), /* PWM9 IO mux selection …
47 …MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(2, 2, 0)), /* PWM10 IO mux selection…
48 …MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(2, 2, 1)), /* PWM10 IO mux selection…
49 …MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(4, 4, 0)), /* PWM11 IO mux selection…
50 …MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(4, 4, 1)), /* PWM11 IO mux selection…
51 …MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(6, 6, 0)), /* PWM12 IO mux selection…
52 …MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(6, 6, 1)), /* PWM12 IO mux selection…
53 …MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(8, 8, 0)), /* PWM13 IO mux selection…
54 …MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(8, 8, 1)), /* PWM13 IO mux selection…
55 …MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(10, 10, 0)), /* PWM14 IO mux selecti…
56 …MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(10, 10, 1)), /* PWM14 IO mux selecti…
57 …MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(12, 12, 0)), /* PWM15 IO mux selecti…
58 …MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(12, 12, 1)), /* PWM15 IO mux selecti…
59 …MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_3, 0x0308, RK_GENMASK_VAL(14, 14, 0)), /* SDMMC2 IO mux select…
60 …MR_TOPGRF(RK_GPIO3, RK_PA5, RK_FUNC_5, 0x0308, RK_GENMASK_VAL(14, 14, 1)), /* SDMMC2 IO mux select…
61 …MR_TOPGRF(RK_GPIO0, RK_PB5, RK_FUNC_2, 0x030c, RK_GENMASK_VAL(0, 0, 0)), /* SPI0 IO mux selection …
62 …MR_TOPGRF(RK_GPIO2, RK_PD3, RK_FUNC_3, 0x030c, RK_GENMASK_VAL(0, 0, 1)), /* SPI0 IO mux selection …
63 …MR_TOPGRF(RK_GPIO2, RK_PB5, RK_FUNC_3, 0x030c, RK_GENMASK_VAL(2, 2, 0)), /* SPI1 IO mux selection …
64 …MR_TOPGRF(RK_GPIO3, RK_PC3, RK_FUNC_3, 0x030c, RK_GENMASK_VAL(2, 2, 1)), /* SPI1 IO mux selection …
65 …MR_TOPGRF(RK_GPIO2, RK_PC1, RK_FUNC_4, 0x030c, RK_GENMASK_VAL(4, 4, 0)), /* SPI2 IO mux selection …
66 …MR_TOPGRF(RK_GPIO3, RK_PA0, RK_FUNC_3, 0x030c, RK_GENMASK_VAL(4, 4, 1)), /* SPI2 IO mux selection …
67 …MR_TOPGRF(RK_GPIO4, RK_PB3, RK_FUNC_4, 0x030c, RK_GENMASK_VAL(6, 6, 0)), /* SPI3 IO mux selection …
68 …MR_TOPGRF(RK_GPIO4, RK_PC2, RK_FUNC_2, 0x030c, RK_GENMASK_VAL(6, 6, 1)), /* SPI3 IO mux selection …
69 …MR_TOPGRF(RK_GPIO2, RK_PB4, RK_FUNC_2, 0x030c, RK_GENMASK_VAL(8, 8, 0)), /* UART1 IO mux selection…
70 …MR_TOPGRF(RK_GPIO0, RK_PD1, RK_FUNC_1, 0x030c, RK_GENMASK_VAL(8, 8, 1)), /* UART1 IO mux selection…
71 …MR_TOPGRF(RK_GPIO0, RK_PD1, RK_FUNC_1, 0x030c, RK_GENMASK_VAL(10, 10, 0)), /* UART2 IO mux selecti…
72 …MR_TOPGRF(RK_GPIO1, RK_PD5, RK_FUNC_2, 0x030c, RK_GENMASK_VAL(10, 10, 1)), /* UART2 IO mux selecti…
73 …MR_TOPGRF(RK_GPIO1, RK_PA1, RK_FUNC_2, 0x030c, RK_GENMASK_VAL(12, 12, 0)), /* UART3 IO mux selecti…
74 …MR_TOPGRF(RK_GPIO3, RK_PB7, RK_FUNC_4, 0x030c, RK_GENMASK_VAL(12, 12, 1)), /* UART3 IO mux selecti…
75 …MR_TOPGRF(RK_GPIO1, RK_PA6, RK_FUNC_2, 0x030c, RK_GENMASK_VAL(14, 14, 0)), /* UART4 IO mux selecti…
76 …MR_TOPGRF(RK_GPIO3, RK_PB2, RK_FUNC_4, 0x030c, RK_GENMASK_VAL(14, 14, 1)), /* UART4 IO mux selecti…
77 …MR_TOPGRF(RK_GPIO2, RK_PA2, RK_FUNC_3, 0x0310, RK_GENMASK_VAL(0, 0, 0)), /* UART5 IO mux selection…
78 …MR_TOPGRF(RK_GPIO3, RK_PC2, RK_FUNC_4, 0x0310, RK_GENMASK_VAL(0, 0, 1)), /* UART5 IO mux selection…
79 …MR_TOPGRF(RK_GPIO2, RK_PA4, RK_FUNC_3, 0x0310, RK_GENMASK_VAL(2, 2, 0)), /* UART6 IO mux selection…
80 …MR_TOPGRF(RK_GPIO1, RK_PD5, RK_FUNC_3, 0x0310, RK_GENMASK_VAL(2, 2, 1)), /* UART6 IO mux selection…
81 …MR_TOPGRF(RK_GPIO2, RK_PA6, RK_FUNC_3, 0x0310, RK_GENMASK_VAL(5, 4, 0)), /* UART7 IO mux selection…
82 …MR_TOPGRF(RK_GPIO3, RK_PC4, RK_FUNC_4, 0x0310, RK_GENMASK_VAL(5, 4, 1)), /* UART7 IO mux selection…
83 …MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0310, RK_GENMASK_VAL(5, 4, 2)), /* UART7 IO mux selection…
84 …MR_TOPGRF(RK_GPIO2, RK_PC5, RK_FUNC_3, 0x0310, RK_GENMASK_VAL(6, 6, 0)), /* UART8 IO mux selection…
85 …MR_TOPGRF(RK_GPIO2, RK_PD7, RK_FUNC_4, 0x0310, RK_GENMASK_VAL(6, 6, 1)), /* UART8 IO mux selection…
86 …MR_TOPGRF(RK_GPIO2, RK_PB0, RK_FUNC_3, 0x0310, RK_GENMASK_VAL(9, 8, 0)), /* UART9 IO mux selection…
87 …MR_TOPGRF(RK_GPIO4, RK_PC5, RK_FUNC_4, 0x0310, RK_GENMASK_VAL(9, 8, 1)), /* UART9 IO mux selection…
88 …MR_TOPGRF(RK_GPIO4, RK_PA4, RK_FUNC_4, 0x0310, RK_GENMASK_VAL(9, 8, 2)), /* UART9 IO mux selection…
89 …MR_TOPGRF(RK_GPIO1, RK_PA2, RK_FUNC_1, 0x0310, RK_GENMASK_VAL(11, 10, 0)), /* I2S1 IO mux selectio…
90 …MR_TOPGRF(RK_GPIO3, RK_PC6, RK_FUNC_4, 0x0310, RK_GENMASK_VAL(11, 10, 1)), /* I2S1 IO mux selectio…
91 …MR_TOPGRF(RK_GPIO2, RK_PD0, RK_FUNC_5, 0x0310, RK_GENMASK_VAL(11, 10, 2)), /* I2S1 IO mux selectio…
92 …MR_TOPGRF(RK_GPIO2, RK_PC1, RK_FUNC_1, 0x0310, RK_GENMASK_VAL(12, 12, 0)), /* I2S2 IO mux selectio…
93 …MR_TOPGRF(RK_GPIO4, RK_PB6, RK_FUNC_5, 0x0310, RK_GENMASK_VAL(12, 12, 1)), /* I2S2 IO mux selectio…
94 …MR_TOPGRF(RK_GPIO3, RK_PA2, RK_FUNC_4, 0x0310, RK_GENMASK_VAL(14, 14, 0)), /* I2S3 IO mux selectio…
95 …MR_TOPGRF(RK_GPIO4, RK_PC2, RK_FUNC_5, 0x0310, RK_GENMASK_VAL(14, 14, 1)), /* I2S3 IO mux selectio…
96 …MR_TOPGRF(RK_GPIO1, RK_PA6, RK_FUNC_3, 0x0314, RK_GENMASK_VAL(0, 0, 0)), /* PDM IO mux selection M…
97 …MR_TOPGRF(RK_GPIO3, RK_PD6, RK_FUNC_5, 0x0314, RK_GENMASK_VAL(0, 0, 1)), /* PDM IO mux selection M…
98 …MR_TOPGRF(RK_GPIO0, RK_PA5, RK_FUNC_3, 0x0314, RK_GENMASK_VAL(3, 2, 0)), /* PCIE20 IO mux selectio…
99 …MR_TOPGRF(RK_GPIO2, RK_PD0, RK_FUNC_4, 0x0314, RK_GENMASK_VAL(3, 2, 1)), /* PCIE20 IO mux selectio…
100 …MR_TOPGRF(RK_GPIO1, RK_PB0, RK_FUNC_4, 0x0314, RK_GENMASK_VAL(3, 2, 2)), /* PCIE20 IO mux selectio…
101 …MR_TOPGRF(RK_GPIO0, RK_PA4, RK_FUNC_3, 0x0314, RK_GENMASK_VAL(5, 4, 0)), /* PCIE30X1 IO mux select…
102 …MR_TOPGRF(RK_GPIO2, RK_PD2, RK_FUNC_4, 0x0314, RK_GENMASK_VAL(5, 4, 1)), /* PCIE30X1 IO mux select…
103 …MR_TOPGRF(RK_GPIO1, RK_PA5, RK_FUNC_4, 0x0314, RK_GENMASK_VAL(5, 4, 2)), /* PCIE30X1 IO mux select…
104 …MR_TOPGRF(RK_GPIO0, RK_PA6, RK_FUNC_2, 0x0314, RK_GENMASK_VAL(7, 6, 0)), /* PCIE30X2 IO mux select…
105 …MR_TOPGRF(RK_GPIO2, RK_PD4, RK_FUNC_4, 0x0314, RK_GENMASK_VAL(7, 6, 1)), /* PCIE30X2 IO mux select…
106 …MR_TOPGRF(RK_GPIO4, RK_PC2, RK_FUNC_4, 0x0314, RK_GENMASK_VAL(7, 6, 2)), /* PCIE30X2 IO mux select…
109 static int rk3568_set_mux(struct rockchip_pin_bank *bank, int pin, int mux) in rk3568_set_mux() argument
111 struct rockchip_pinctrl_priv *priv = bank->priv; in rk3568_set_mux()
114 int reg, ret, mask; in rk3568_set_mux() local
118 debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux); in rk3568_set_mux()
120 if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) in rk3568_set_mux()
121 regmap = priv->regmap_pmu; in rk3568_set_mux()
123 regmap = priv->regmap_base; in rk3568_set_mux()
125 reg = bank->iomux[iomux_num].offset; in rk3568_set_mux()
127 reg += 0x4; in rk3568_set_mux()
132 data |= (mux & mask) << bit; in rk3568_set_mux()
133 ret = regmap_write(regmap, reg, data); in rk3568_set_mux()
146 int *reg, u8 *bit) in rk3568_calc_pull_reg_and_bit() argument
148 struct rockchip_pinctrl_priv *info = bank->priv; in rk3568_calc_pull_reg_and_bit()
150 if (bank->bank_num == 0) { in rk3568_calc_pull_reg_and_bit()
151 *regmap = info->regmap_pmu; in rk3568_calc_pull_reg_and_bit()
152 *reg = RK3568_PULL_PMU_OFFSET; in rk3568_calc_pull_reg_and_bit()
153 *reg += bank->bank_num * RK3568_PULL_BANK_STRIDE; in rk3568_calc_pull_reg_and_bit()
155 *regmap = info->regmap_base; in rk3568_calc_pull_reg_and_bit()
156 *reg = RK3568_PULL_GRF_OFFSET; in rk3568_calc_pull_reg_and_bit()
157 *reg += (bank->bank_num - 1) * RK3568_PULL_BANK_STRIDE; in rk3568_calc_pull_reg_and_bit()
160 *reg += ((pin_num / RK3568_PULL_PINS_PER_REG) * 4); in rk3568_calc_pull_reg_and_bit()
173 int *reg, u8 *bit) in rk3568_calc_drv_reg_and_bit() argument
175 struct rockchip_pinctrl_priv *info = bank->priv; in rk3568_calc_drv_reg_and_bit()
178 if (bank->bank_num == 0) { in rk3568_calc_drv_reg_and_bit()
179 *regmap = info->regmap_pmu; in rk3568_calc_drv_reg_and_bit()
180 *reg = RK3568_DRV_PMU_OFFSET; in rk3568_calc_drv_reg_and_bit()
182 *regmap = info->regmap_base; in rk3568_calc_drv_reg_and_bit()
183 *reg = RK3568_DRV_GRF_OFFSET; in rk3568_calc_drv_reg_and_bit()
184 *reg += (bank->bank_num - 1) * RK3568_DRV_BANK_STRIDE; in rk3568_calc_drv_reg_and_bit()
187 *reg += ((pin_num / RK3568_DRV_PINS_PER_REG) * 4); in rk3568_calc_drv_reg_and_bit()
200 int *reg, u8 *bit) in rk3568_calc_schmitt_reg_and_bit() argument
202 struct rockchip_pinctrl_priv *info = bank->priv; in rk3568_calc_schmitt_reg_and_bit()
204 if (bank->bank_num == 0) { in rk3568_calc_schmitt_reg_and_bit()
205 *regmap = info->regmap_pmu; in rk3568_calc_schmitt_reg_and_bit()
206 *reg = RK3568_SCHMITT_PMUGRF_OFFSET; in rk3568_calc_schmitt_reg_and_bit()
208 *regmap = info->regmap_base; in rk3568_calc_schmitt_reg_and_bit()
209 *reg = RK3568_SCHMITT_GRF_OFFSET; in rk3568_calc_schmitt_reg_and_bit()
210 *reg += (bank->bank_num - 1) * RK3568_SCHMITT_BANK_STRIDE; in rk3568_calc_schmitt_reg_and_bit()
213 *reg += ((pin_num / RK3568_SCHMITT_PINS_PER_REG) * 4); in rk3568_calc_schmitt_reg_and_bit()
224 int reg, ret; in rk3568_set_pull() local
229 return -ENOTSUPP; in rk3568_set_pull()
231 rk3568_calc_pull_reg_and_bit(bank, pin_num, ®map, ®, &bit); in rk3568_set_pull()
232 type = bank->pull_type[pin_num / 8]; in rk3568_set_pull()
240 data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16); in rk3568_set_pull()
243 ret = regmap_write(regmap, reg, data); in rk3568_set_pull()
252 int reg; in rk3568_set_drive() local
255 int drv = (1 << (strength + 1)) - 1; in rk3568_set_drive()
258 rk3568_calc_drv_reg_and_bit(bank, pin_num, ®map, ®, &bit); in rk3568_set_drive()
261 data = ((1 << RK3568_DRV_BITS_PER_PIN) - 1) << (bit + 16); in rk3568_set_drive()
264 ret = regmap_write(regmap, reg, data); in rk3568_set_drive()
268 if (bank->bank_num == 1 && pin_num == 21) in rk3568_set_drive()
269 reg = 0x0840; in rk3568_set_drive()
270 else if (bank->bank_num == 2 && pin_num == 2) in rk3568_set_drive()
271 reg = 0x0844; in rk3568_set_drive()
272 else if (bank->bank_num == 2 && pin_num == 8) in rk3568_set_drive()
273 reg = 0x0848; in rk3568_set_drive()
274 else if (bank->bank_num == 3 && pin_num == 0) in rk3568_set_drive()
275 reg = 0x084c; in rk3568_set_drive()
276 else if (bank->bank_num == 3 && pin_num == 6) in rk3568_set_drive()
277 reg = 0x0850; in rk3568_set_drive()
278 else if (bank->bank_num == 4 && pin_num == 0) in rk3568_set_drive()
279 reg = 0x0854; in rk3568_set_drive()
283 data = ((1 << RK3568_DRV_BITS_PER_PIN) - 1) << 16; in rk3568_set_drive()
286 return regmap_write(regmap, reg, data); in rk3568_set_drive()
293 int reg; in rk3568_set_schmitt() local
297 rk3568_calc_schmitt_reg_and_bit(bank, pin_num, ®map, ®, &bit); in rk3568_set_schmitt()
300 data = ((1 << RK3568_SCHMITT_BITS_PER_PIN) - 1) << (bit + 16); in rk3568_set_schmitt()
303 return regmap_write(regmap, reg, data); in rk3568_set_schmitt()
344 .compatible = "rockchip,rk3568-pinctrl",