pinctrl/rockchip/pinctrl-rk3308.c

1 // SPDX-License-Identifier: GPL-2.0+
13 #include "pinctrl-rockchip.h"
20 		.func = 1,
22 		.route_val = BIT(16 + 0) | BIT(0),
25 		.bank_num = 1,
29 		.route_val = BIT(16 + 2) | BIT(16 + 3),
36 		.route_val = BIT(16 + 2) | BIT(16 + 3) | BIT(2),
43 		.route_val = BIT(16 + 4),
50 		.route_val = BIT(16 + 4) | BIT(4),
52 		/* i2s-8ch-1-sclktxm0 */
53 		.bank_num = 1,
57 		.route_val = BIT(16 + 3),
59 		/* i2s-8ch-1-sclkrxm0 */
60 		.bank_num = 1,
64 		.route_val = BIT(16 + 3),
66 		/* i2s-8ch-1-sclktxm1 */
67 		.bank_num = 1,
71 		.route_val = BIT(16 + 3) | BIT(3),
73 		/* i2s-8ch-1-sclkrxm1 */
74 		.bank_num = 1,
78 		.route_val = BIT(16 + 3) | BIT(3),
80 		/* pdm-clkm0 */
81 		.bank_num = 1,
85 		.route_val = BIT(16 + 12) | BIT(16 + 13),
87 		/* pdm-clkm1 */
88 		.bank_num = 1,
92 		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(12),
94 		/* pdm-clkm2 */
99 		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(13),
101 		/* pdm-clkm-m2 */
106 		.route_val = BIT(16 + 2) | BIT(2),
115 		.func = 1,
117 		.route_val = BIT(16 + 0) | BIT(0),
120 		.bank_num = 1,
124 		.route_val = BIT(16 + 2) | BIT(16 + 3),
131 		.route_val = BIT(16 + 2) | BIT(16 + 3) | BIT(2),
138 		.route_val = BIT(16 + 8) | BIT(16 + 9),
145 		.route_val = BIT(16 + 8) | BIT(16 + 9) | BIT(8),
152 		.route_val = BIT(16 + 8) | BIT(16 + 9) | BIT(9),
154 		/* i2s-8ch-1-sclktxm0 */
155 		.bank_num = 1,
159 		.route_val = BIT(16 + 3),
161 		/* i2s-8ch-1-sclkrxm0 */
162 		.bank_num = 1,
166 		.route_val = BIT(16 + 3),
168 		/* i2s-8ch-1-sclktxm1 */
169 		.bank_num = 1,
173 		.route_val = BIT(16 + 3) | BIT(3),
175 		/* i2s-8ch-1-sclkrxm1 */
176 		.bank_num = 1,
180 		.route_val = BIT(16 + 3) | BIT(3),
182 		/* pdm-clkm0 */
183 		.bank_num = 1,
187 		.route_val =  BIT(16 + 12) | BIT(16 + 13),
189 		/* pdm-clkm1 */
190 		.bank_num = 1,
194 		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(12),
196 		/* pdm-clkm2 */
201 		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(13),
203 		/* pdm-clkm-m2 */
208 		.route_val = BIT(16 + 2) | BIT(2),
215 		.route_val = BIT(16 + 9),
222 		.route_val = BIT(16 + 9) | BIT(9),
229 		.route_val = BIT(16 + 10) | BIT(16 + 11),
232 		.bank_num = 1,
236 		.route_val = BIT(16 + 10) | BIT(16 + 11) | BIT(10),
243 		.route_val = BIT(16 + 10) | BIT(16 + 11) | BIT(11),
250 		.route_val = BIT(16 + 12) | BIT(16 + 13),
253 		.bank_num = 1,
257 		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(12),
264 		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(13),
267 		.bank_num = 1,
271 		.route_val = BIT(16 + 14),
278 		.route_val = BIT(16 + 14) | BIT(14),
285 		.route_val = BIT(16 + 15),
292 		.route_val = BIT(16 + 15) | BIT(15),
297 		.num = 1,
300 		.bit = 12,
303 		.num = 1,
306 		.bit = 0,
309 		.num = 1,
312 		.bit = 4,
315 		.num = 1,
318 		.bit = 8,
321 		.num = 1,
324 		.bit = 12,
327 		.num = 1,
330 		.bit = 0,
333 		.num = 1,
336 		.bit = 4,
339 		.num = 1,
342 		.bit = 8,
348 		.bit = 8,
354 		.bit = 12,
361 		.num = 1,
364 		.bit = 12,
367 		.num = 1,
370 		.bit = 0,
373 		.num = 1,
376 		.bit = 4,
379 		.num = 1,
382 		.bit = 8,
385 		.num = 1,
388 		.bit = 12,
391 		.num = 1,
394 		.bit = 0,
397 		.num = 1,
400 		.bit = 4,
403 		.num = 1,
406 		.bit = 8,
412 		.bit = 8,
418 		.bit = 12,
424 		.bit = 0,
430 		.bit = 4,
436 		.bit = 8,
442 		.bit = 0,
448 		.bit = 4,
455 	struct rockchip_pinctrl_priv *priv = bank->priv;  in rk3308_set_mux()
459 	u8 bit;  in rk3308_set_mux()  local
462 	debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux);  in rk3308_set_mux()
464 	if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)  in rk3308_set_mux()
465 		regmap = priv->regmap_pmu;  in rk3308_set_mux()
467 		regmap = priv->regmap_base;  in rk3308_set_mux()
470 	mux_type = bank->iomux[iomux_num].type;  in rk3308_set_mux()
471 	reg = bank->iomux[iomux_num].offset;  in rk3308_set_mux()
475 		bit = (pin % 4) * 4;  in rk3308_set_mux()
478 		bit = (pin % 8) * 2;  in rk3308_set_mux()
482 	if (bank->recalced_mask & BIT(pin))  in rk3308_set_mux()
483 		rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask);  in rk3308_set_mux()
485 	data = (mask << (bit + 16));  in rk3308_set_mux()
486 	data |= (mux & mask) << bit;  in rk3308_set_mux()
499 					 int *reg, u8 *bit)  in rk3308_calc_pull_reg_and_bit()  argument
501 	struct rockchip_pinctrl_priv *priv = bank->priv;  in rk3308_calc_pull_reg_and_bit()
503 	*regmap = priv->regmap_base;  in rk3308_calc_pull_reg_and_bit()
505 	*reg += bank->bank_num * RK3308_PULL_BANK_STRIDE;  in rk3308_calc_pull_reg_and_bit()
508 	*bit = (pin_num % RK3308_PULL_PINS_PER_REG);  in rk3308_calc_pull_reg_and_bit()
509 	*bit *= RK3308_PULL_BITS_PER_PIN;  in rk3308_calc_pull_reg_and_bit()
519 					int *reg, u8 *bit)  in rk3308_calc_drv_reg_and_bit()  argument
521 	struct rockchip_pinctrl_priv *priv = bank->priv;  in rk3308_calc_drv_reg_and_bit()
523 	*regmap = priv->regmap_base;  in rk3308_calc_drv_reg_and_bit()
525 	*reg += bank->bank_num * RK3308_DRV_BANK_STRIDE;  in rk3308_calc_drv_reg_and_bit()
528 	*bit = (pin_num % RK3308_DRV_PINS_PER_REG);  in rk3308_calc_drv_reg_and_bit()
529 	*bit *= RK3308_DRV_BITS_PER_PIN;  in rk3308_calc_drv_reg_and_bit()
539 					   int *reg, u8 *bit)  in rk3308_calc_schmitt_reg_and_bit()  argument
541 	struct rockchip_pinctrl_priv *priv = bank->priv;  in rk3308_calc_schmitt_reg_and_bit()
543 	*regmap = priv->regmap_base;  in rk3308_calc_schmitt_reg_and_bit()
546 	*reg += bank->bank_num * RK3308_SCHMITT_BANK_STRIDE;  in rk3308_calc_schmitt_reg_and_bit()
548 	*bit = pin_num % RK3308_SCHMITT_PINS_PER_REG;  in rk3308_calc_schmitt_reg_and_bit()
558 	u8 bit, type;  in rk3308_set_pull()  local
562 		return -ENOTSUPP;  in rk3308_set_pull()
564 	rk3308_calc_pull_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);  in rk3308_set_pull()
565 	type = bank->pull_type[pin_num / 8];  in rk3308_set_pull()
573 	data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);  in rk3308_set_pull()
575 	data |= (ret << bit);  in rk3308_set_pull()
587 	u8 bit;  in rk3308_set_drive()  local
589 	rk3308_calc_drv_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);  in rk3308_set_drive()
592 	data = ((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << (bit + 16);  in rk3308_set_drive()
593 	data |= (strength << bit);  in rk3308_set_drive()
603 	u8 bit;  in rk3308_set_schmitt()  local
606 	rk3308_calc_schmitt_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);  in rk3308_set_schmitt()
608 	data = BIT(bit + 16) | (enable << bit);  in rk3308_set_schmitt()
618 	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", IOMUX_8WIDTH_2BIT,
668 		.compatible = "rockchip,rk3308-pinctrl",
679 #define RK3308B_GRF_I2C3_IOFUNC_SRC_CTRL	(BIT(16 + 10) | BIT(10))
680 #define RK3308B_GRF_GPIO2A3_SEL_SRC_CTRL	(BIT(16 + 7)  | BIT(7))
681 #define RK3308B_GRF_GPIO2A2_SEL_SRC_CTRL	(BIT(16 + 3)  | BIT(3))
684 #define RK3308B_GRF_GPIO2C0_SEL_SRC_CTRL	(BIT(16 + 11) | BIT(11))
685 #define RK3308B_GRF_GPIO3B3_SEL_SRC_CTRL	(BIT(16 + 7)  | BIT(7))
686 #define RK3308B_GRF_GPIO3B2_SEL_SRC_CTRL	(BIT(16 + 3)  | BIT(3))
696 	ret = regmap_write(priv->regmap_base, RK3308B_GRF_SOC_CON13,  in rk3308b_soc_data_init()
703 	ret = regmap_write(priv->regmap_base, RK3308B_GRF_SOC_CON15,  in rk3308b_soc_data_init()
718 		dev->driver_data = (ulong)&rk3308b_pin_ctrl;  in rk3308_pinctrl_probe()