Lines Matching +full:0 +full:x308

18 		.bank_num = 0,
21 		.route_offset = 0x314,
22 		.route_val = BIT(16 + 0) | BIT(0),
28 		.route_offset = 0x314,
35 		.route_offset = 0x314,
39 		.bank_num = 0,
42 		.route_offset = 0x314,
49 		.route_offset = 0x314,
56 		.route_offset = 0x308,
63 		.route_offset = 0x308,
70 		.route_offset = 0x308,
77 		.route_offset = 0x308,
84 		.route_offset = 0x308,
91 		.route_offset = 0x308,
98 		.route_offset = 0x308,
105 		.route_offset = 0x600,
113 		.bank_num = 0,
116 		.route_offset = 0x314,
117 		.route_val = BIT(16 + 0) | BIT(0),
123 		.route_offset = 0x314,
130 		.route_offset = 0x314,
134 		.bank_num = 0,
137 		.route_offset = 0x608,
144 		.route_offset = 0x608,
149 		.pin = 0,
151 		.route_offset = 0x608,
158 		.route_offset = 0x308,
165 		.route_offset = 0x308,
172 		.route_offset = 0x308,
179 		.route_offset = 0x308,
186 		.route_offset = 0x308,
193 		.route_offset = 0x308,
200 		.route_offset = 0x308,
207 		.route_offset = 0x600,
214 		.route_offset = 0x314,
221 		.route_offset = 0x314,
225 		.bank_num = 0,
228 		.route_offset = 0x314,
235 		.route_offset = 0x314,
242 		.route_offset = 0x314,
246 		.bank_num = 0,
249 		.route_offset = 0x314,
256 		.route_offset = 0x314,
263 		.route_offset = 0x314,
270 		.route_offset = 0x314,
277 		.route_offset = 0x314,
284 		.route_offset = 0x314,
288 		.bank_num = 0,
291 		.route_offset = 0x314,
299 		.reg = 0x28,
301 		.mask = 0x7
305 		.reg = 0x2c,
306 		.bit = 0,
307 		.mask = 0x3
311 		.reg = 0x30,
313 		.mask = 0x7
317 		.reg = 0x30,
319 		.mask = 0x7
323 		.reg = 0x30,
325 		.mask = 0x7
329 		.reg = 0x34,
330 		.bit = 0,
331 		.mask = 0x7
335 		.reg = 0x34,
337 		.mask = 0x7
341 		.reg = 0x34,
343 		.mask = 0x7
347 		.reg = 0x68,
349 		.mask = 0x7
353 		.reg = 0x68,
355 		.mask = 0x7
363 		.reg = 0x28,
365 		.mask = 0xf
369 		.reg = 0x2c,
370 		.bit = 0,
371 		.mask = 0x3
375 		.reg = 0x30,
377 		.mask = 0xf
381 		.reg = 0x30,
383 		.mask = 0xf
387 		.reg = 0x30,
389 		.mask = 0xf
393 		.reg = 0x34,
394 		.bit = 0,
395 		.mask = 0xf
399 		.reg = 0x34,
401 		.mask = 0xf
405 		.reg = 0x34,
407 		.mask = 0xf
411 		.reg = 0x68,
413 		.mask = 0xf
417 		.reg = 0x68,
419 		.mask = 0xf
423 		.reg = 0x608,
424 		.bit = 0,
425 		.mask = 0x7
429 		.reg = 0x608,
431 		.mask = 0x7
435 		.reg = 0x610,
437 		.mask = 0x7
441 		.reg = 0x610,
442 		.bit = 0,
443 		.mask = 0x7
447 		.reg = 0x610,
449 		.mask = 0x7
474 			reg += 0x4;  in rk3308_set_mux()
476 		mask = 0xf;  in rk3308_set_mux()
479 		mask = 0x3;  in rk3308_set_mux()
492 #define RK3308_PULL_OFFSET		0xa0
512 #define RK3308_DRV_GRF_OFFSET		0x100
534 #define RK3308_SCHMITT_GRF_OFFSET	0x1a0
550 	return 0;  in rk3308_calc_schmitt_reg_and_bit()
567 	if (ret < 0) {  in rk3308_set_pull()
614 	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_8WIDTH_2BIT,
640 	.grf_mux_offset		= 0x0,
655 	.grf_mux_offset		= 0x0,
675 #define RK3308B_GRF_SOC_CON13			0x608
676 #define RK3308B_GRF_SOC_CON15			0x610
710 	return 0;  in rk3308b_soc_data_init()