Lines Matching refs:reg_set
115 reg_set(comphy_base + COMMON_PHY_SD_CTRL1, in comphy_pcie_power_up()
119 reg_set(comphy_base + COMMON_PHY_SD_CTRL1, in comphy_pcie_power_up()
131 reg_set((void __iomem *)DFX_DEV_GEN_CTRL12, in comphy_pcie_power_up()
148 reg_set(comphy_addr + COMMON_PHY_CFG1_REG, data, mask); in comphy_pcie_power_up()
155 reg_set(comphy_addr + COMMON_PHY_CFG1_REG, data, mask); in comphy_pcie_power_up()
173 reg_set(hpipe_addr + HPIPE_RST_CLK_CTRL_REG, data, mask); in comphy_pcie_power_up()
183 reg_set(hpipe_addr + HPIPE_CLK_SRC_LO_REG, data, mask); in comphy_pcie_power_up()
199 reg_set(hpipe_addr + HPIPE_CLK_SRC_HI_REG, data, mask); in comphy_pcie_power_up()
201 reg_set(hpipe_addr + HPIPE_LANE_EQ_CFG1_REG, in comphy_pcie_power_up()
205 reg_set(hpipe_addr + HPIPE_DFE_CTRL_28_REG, in comphy_pcie_power_up()
237 reg_set(hpipe_addr + HPIPE_MISC_REG, data, mask); in comphy_pcie_power_up()
250 reg_set(hpipe_addr + HPIPE_PWR_PLL_REG, data, mask); in comphy_pcie_power_up()
256 reg_set(hpipe_addr + HPIPE_LANE_ALIGN_REG, data, mask); in comphy_pcie_power_up()
264 reg_set(hpipe_addr + HPIPE_GLOBAL_PM_CTRL, in comphy_pcie_power_up()
278 reg_set(hpipe_addr + HPIPE_INTERFACE_REG, data, mask); in comphy_pcie_power_up()
286 reg_set(hpipe_addr + HPIPE_PCIE_REG0, data, mask); in comphy_pcie_power_up()
297 reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_REG, data, mask); in comphy_pcie_power_up()
305 reg_set(hpipe_addr + HPIPE_TX_TRAIN_REG, data, mask); in comphy_pcie_power_up()
317 reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_11_REG, data, mask); in comphy_pcie_power_up()
331 reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_5_REG, data, mask); in comphy_pcie_power_up()
336 reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_0_REG, data, mask); in comphy_pcie_power_up()
341 reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_4_REG, data, mask); in comphy_pcie_power_up()
347 reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_REG, data, mask); in comphy_pcie_power_up()
352 reg_set(hpipe_addr + HPIPE_PWR_CTR_DTL_REG, data, mask); in comphy_pcie_power_up()
357 reg_set(hpipe_addr + HPIPE_G3_SETTING_4_REG, data, mask); in comphy_pcie_power_up()
362 reg_set(hpipe_addr + HPIPE_DFE_REG0, data, mask); in comphy_pcie_power_up()
373 reg_set(hpipe_addr + HPIPE_G3_SET_1_REG, data, mask); in comphy_pcie_power_up()
378 reg_set(hpipe_addr + HPIPE_SAMPLER_N_PROC_CALIB_CTRL_REG, data, mask); in comphy_pcie_power_up()
380 reg_set(hpipe_addr + HPIPE_SAMPLER_N_PROC_CALIB_CTRL_REG, 0, mask); in comphy_pcie_power_up()
388 reg_set(hpipe_addr + HPIPE_G3_SETTING_3_REG, data, mask); in comphy_pcie_power_up()
393 reg_set(hpipe_addr + HPIPE_FRAME_DETECT_CTRL_3_REG, data, mask); in comphy_pcie_power_up()
402 reg_set(hpipe_addr + HPIPE_CDR_CONTROL_REG, data, mask); in comphy_pcie_power_up()
405 reg_set(hpipe_addr + HPIPE_DFE_CONTROL_REG, data, mask); in comphy_pcie_power_up()
414 reg_set(hpipe_addr + HPIPE_G2_SET_1_REG, data, mask); in comphy_pcie_power_up()
419 reg_set(hpipe_addr + HPIPE_G2_SETTINGS_4_REG, data, mask); in comphy_pcie_power_up()
424 reg_set(hpipe_addr + HPIPE_LANE_CFG4_REG, data, mask); in comphy_pcie_power_up()
429 reg_set(hpipe_addr + HPIPE_VDD_CAL_CTRL_REG, data, mask); in comphy_pcie_power_up()
434 reg_set(hpipe_addr + HPIPE_G3_SETTING_5_REG, data, mask); in comphy_pcie_power_up()
443 reg_set(hpipe_addr + HPIPE_LANE_EQ_REMOTE_SETTING_REG, data, mask); in comphy_pcie_power_up()
449 reg_set(hpipe_addr + HPIPE_LANE_EQU_CONFIG_0_REG, data, mask); in comphy_pcie_power_up()
463 reg_set(comphy_base + COMMON_PHY_SD_CTRL1, in comphy_pcie_power_up()
475 reg_set(HPIPE_ADDR(hpipe_base, 0) + in comphy_pcie_power_up()
486 reg_set(hpipe_addr + HPIPE_RST_CLK_CTRL_REG, in comphy_pcie_power_up()
494 reg_set(comphy_base + COMMON_PHY_SD_CTRL1, in comphy_pcie_power_up()
543 reg_set(comphy_addr + COMMON_PHY_CFG1_REG, data, mask); in comphy_usb3_power_up()
550 reg_set(comphy_addr + COMMON_PHY_CFG1_REG, data, mask); in comphy_usb3_power_up()
569 reg_set(hpipe_addr + HPIPE_RST_CLK_CTRL_REG, data, mask); in comphy_usb3_power_up()
571 reg_set(hpipe_addr + HPIPE_CLK_SRC_LO_REG, in comphy_usb3_power_up()
575 reg_set(hpipe_addr + HPIPE_MISC_REG, in comphy_usb3_power_up()
584 reg_set(hpipe_addr + HPIPE_PWR_PLL_REG, data, mask); in comphy_usb3_power_up()
586 reg_set(hpipe_addr + HPIPE_GLOBAL_PM_CTRL, in comphy_usb3_power_up()
590 reg_set(hpipe_addr + HPIPE_INTERFACE_REG, in comphy_usb3_power_up()
594 reg_set(hpipe_addr + HPIPE_LOOPBACK_REG, in comphy_usb3_power_up()
598 reg_set(hpipe_addr + HPIPE_LANE_CONFIG0_REG, in comphy_usb3_power_up()
602 reg_set(hpipe_addr + HPIPE_TST_MODE_CTRL_REG, in comphy_usb3_power_up()
617 reg_set(hpipe_addr + HPIPE_LANE_CFG4_REG, data, mask); in comphy_usb3_power_up()
622 reg_set(hpipe_addr + HPIPE_RST_CLK_CTRL_REG, in comphy_usb3_power_up()
687 reg_set(sata_base + SATA3_VENDOR_ADDRESS, in comphy_sata_power_up()
702 reg_set(sata_base + SATA3_VENDOR_DATA, data, mask); in comphy_sata_power_up()
714 reg_set(comphy_addr + COMMON_PHY_CFG1_REG, data, mask); in comphy_sata_power_up()
717 reg_set(comphy_addr + COMMON_PHY_CFG6_REG, in comphy_sata_power_up()
726 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask); in comphy_sata_power_up()
734 reg_set(hpipe_addr + HPIPE_MISC_REG, in comphy_sata_power_up()
743 reg_set(hpipe_addr + HPIPE_PWR_PLL_REG, data, mask); in comphy_sata_power_up()
745 reg_set(hpipe_addr + HPIPE_INTERFACE_REG, in comphy_sata_power_up()
749 reg_set(hpipe_addr + HPIPE_LOOPBACK_REG, in comphy_sata_power_up()
765 reg_set(hpipe_addr + HPIPE_G1_SET_1_REG, data, mask); in comphy_sata_power_up()
777 reg_set(hpipe_addr + HPIPE_G1_SETTINGS_3_REG, data, mask); in comphy_sata_power_up()
790 reg_set(hpipe_addr + HPIPE_G2_SET_1_REG, data, mask); in comphy_sata_power_up()
807 reg_set(hpipe_addr + HPIPE_G3_SET_1_REG, data, mask); in comphy_sata_power_up()
824 reg_set(hpipe_addr + HPIPE_PWR_CTR_DTL_REG, data, mask); in comphy_sata_power_up()
829 reg_set(hpipe_addr + HPIPE_SAMPLER_N_PROC_CALIB_CTRL_REG, data, mask); in comphy_sata_power_up()
832 reg_set(hpipe_addr + HPIPE_SAMPLER_N_PROC_CALIB_CTRL_REG, data, mask); in comphy_sata_power_up()
837 reg_set(hpipe_addr + HPIPE_VDD_CAL_CTRL_REG, data, mask); in comphy_sata_power_up()
842 reg_set(hpipe_addr + HPIPE_DFE_REG0, data, mask); in comphy_sata_power_up()
849 reg_set(hpipe_addr + HPIPE_DFE_F3_F5_REG, data, mask); in comphy_sata_power_up()
862 reg_set(hpipe_addr + HPIPE_G3_SETTING_3_REG, data, mask); in comphy_sata_power_up()
867 reg_set(hpipe_addr + HPIPE_G3_SETTING_4_REG, data, mask); in comphy_sata_power_up()
874 reg_set(hpipe_addr + HPIPE_PHASE_CONTROL_REG, data, mask); in comphy_sata_power_up()
877 reg_set(hpipe_addr + HPIPE_PHASE_CONTROL_REG, data, mask); in comphy_sata_power_up()
880 reg_set(hpipe_addr + HPIPE_PHASE_CONTROL_REG, data, mask); in comphy_sata_power_up()
891 reg_set(hpipe_addr + HPIPE_G1_SET_0_REG, data, mask); in comphy_sata_power_up()
902 reg_set(hpipe_addr + HPIPE_G2_SET_0_REG, data, mask); in comphy_sata_power_up()
917 reg_set(hpipe_addr + HPIPE_G3_SET_0_REG, data, mask); in comphy_sata_power_up()
922 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG2_REG, data, mask); in comphy_sata_power_up()
925 reg_set(hpipe_addr + HPIPE_PWR_CTR_REG, in comphy_sata_power_up()
928 reg_set(hpipe_addr + HPIPE_PWR_CTR_REG, in comphy_sata_power_up()
932 reg_set(hpipe_addr + HPIPE_PWR_CTR_REG, in comphy_sata_power_up()
935 reg_set(hpipe_addr + HPIPE_PWR_CTR_REG, in comphy_sata_power_up()
944 reg_set(sata_base + SATA3_VENDOR_ADDRESS, in comphy_sata_power_up()
959 reg_set(sata_base + SATA3_VENDOR_DATA, data, mask); in comphy_sata_power_up()
962 reg_set(sata_base + SATA3_VENDOR_ADDRESS, in comphy_sata_power_up()
966 reg_set(sata_base + SATA3_VENDOR_DATA, in comphy_sata_power_up()
1006 reg_set(comphy_addr + COMMON_PHY_CFG1_REG, data, mask); in comphy_sgmii_power_up()
1027 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG0_REG, data, mask); in comphy_sgmii_power_up()
1036 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask); in comphy_sgmii_power_up()
1043 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask); in comphy_sgmii_power_up()
1054 reg_set(hpipe_addr + HPIPE_MISC_REG, data, mask); in comphy_sgmii_power_up()
1060 reg_set(hpipe_addr + HPIPE_PWR_PLL_REG, data, mask); in comphy_sgmii_power_up()
1064 reg_set(hpipe_addr + HPIPE_LOOPBACK_REG, data, mask); in comphy_sgmii_power_up()
1070 reg_set(hpipe_addr + HPIPE_RX_CONTROL_1_REG, data, mask); in comphy_sgmii_power_up()
1074 reg_set(hpipe_addr + HPIPE_PWR_CTR_DTL_REG, data, mask); in comphy_sgmii_power_up()
1079 reg_set(hpipe_addr + HPIPE_G1_SET_0_REG, in comphy_sgmii_power_up()
1091 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG0_REG, data, mask); in comphy_sgmii_power_up()
1111 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask); in comphy_sgmii_power_up()
1130 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask); in comphy_sgmii_power_up()
1152 reg_set(comphy_addr + COMMON_PHY_CFG1_REG, data, mask); in comphy_sfi_power_up()
1167 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG0_REG, data, mask); in comphy_sfi_power_up()
1176 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask); in comphy_sfi_power_up()
1182 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask); in comphy_sfi_power_up()
1197 reg_set(hpipe_addr + HPIPE_MISC_REG, data, mask); in comphy_sfi_power_up()
1203 reg_set(hpipe_addr + HPIPE_PWR_PLL_REG, data, mask); in comphy_sfi_power_up()
1207 reg_set(hpipe_addr + HPIPE_LOOPBACK_REG, data, mask); in comphy_sfi_power_up()
1213 reg_set(hpipe_addr + HPIPE_RX_CONTROL_1_REG, data, mask); in comphy_sfi_power_up()
1217 reg_set(hpipe_addr + HPIPE_PWR_CTR_DTL_REG, data, mask); in comphy_sfi_power_up()
1233 reg_set(hpipe_addr + HPIPE_SPD_DIV_FORCE_REG, data, mask); in comphy_sfi_power_up()
1240 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG2_REG, data, mask); in comphy_sfi_power_up()
1244 reg_set(hpipe_addr + HPIPE_DFE_REG0, data, mask); in comphy_sfi_power_up()
1255 reg_set(hpipe_addr + HPIPE_G1_SET_0_REG, data, mask); in comphy_sfi_power_up()
1261 reg_set(hpipe_addr + HPIPE_G1_SET_2_REG, data, mask); in comphy_sfi_power_up()
1267 reg_set(hpipe_addr + HPIPE_TX_REG1_REG, data, mask); in comphy_sfi_power_up()
1273 reg_set(hpipe_addr + HPIPE_CAL_REG1_REG, data, mask); in comphy_sfi_power_up()
1277 reg_set(hpipe_addr + HPIPE_G1_SETTING_5_REG, data, mask); in comphy_sfi_power_up()
1298 reg_set(hpipe_addr + HPIPE_G1_SET_1_REG, data, mask); in comphy_sfi_power_up()
1305 reg_set(hpipe_addr + HPIPE_DFE_F3_F5_REG, data, mask); in comphy_sfi_power_up()
1310 reg_set(hpipe_addr + HPIPE_G1_SETTINGS_4_REG, data, mask); in comphy_sfi_power_up()
1323 reg_set(hpipe_addr + HPIPE_G1_SETTINGS_3_REG, data, mask); in comphy_sfi_power_up()
1328 reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_5_REG, data, mask); in comphy_sfi_power_up()
1333 reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_0_REG, data, mask); in comphy_sfi_power_up()
1338 reg_set(hpipe_addr + HPIPE_TX_PRESET_INDEX_REG, data, mask); in comphy_sfi_power_up()
1343 reg_set(hpipe_addr + HPIPE_FRAME_DETECT_CTRL_3_REG, data, mask); in comphy_sfi_power_up()
1350 reg_set(hpipe_addr + HPIPE_TX_TRAIN_REG, data, mask); in comphy_sfi_power_up()
1355 reg_set(hpipe_addr + HPIPE_FRAME_DETECT_CTRL_0_REG, data, mask); in comphy_sfi_power_up()
1360 reg_set(hpipe_addr + HPIPE_DME_REG, data, mask); in comphy_sfi_power_up()
1365 reg_set(hpipe_addr + HPIPE_VDD_CAL_0_REG, data, mask); in comphy_sfi_power_up()
1372 reg_set(hpipe_addr + HPIPE_SAMPLER_N_PROC_CALIB_CTRL_REG, data, mask); in comphy_sfi_power_up()
1375 reg_set(hpipe_addr + HPIPE_SAMPLER_N_PROC_CALIB_CTRL_REG, data, mask); in comphy_sfi_power_up()
1380 reg_set(hpipe_addr + HPIPE_VDD_CAL_CTRL_REG, data, mask); in comphy_sfi_power_up()
1390 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG0_REG, data, mask); in comphy_sfi_power_up()
1410 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask); in comphy_sfi_power_up()
1431 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask); in comphy_sfi_power_up()
1453 reg_set(comphy_addr + COMMON_PHY_CFG1_REG, data, mask); in comphy_rxauii_power_up()
1456 reg_set(comphy_base + COMMON_PHY_SD_CTRL1, in comphy_rxauii_power_up()
1461 reg_set(comphy_base + COMMON_PHY_SD_CTRL1, in comphy_rxauii_power_up()
1481 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG0_REG, data, mask); in comphy_rxauii_power_up()
1490 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask); in comphy_rxauii_power_up()
1496 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask); in comphy_rxauii_power_up()
1504 reg_set(hpipe_addr + HPIPE_MISC_REG, in comphy_rxauii_power_up()
1512 reg_set(hpipe_addr + HPIPE_PWR_PLL_REG, data, mask); in comphy_rxauii_power_up()
1514 reg_set(hpipe_addr + HPIPE_LOOPBACK_REG, in comphy_rxauii_power_up()
1521 reg_set(hpipe_addr + HPIPE_RX_CONTROL_1_REG, data, mask); in comphy_rxauii_power_up()
1523 reg_set(hpipe_addr + HPIPE_PWR_CTR_DTL_REG, in comphy_rxauii_power_up()
1530 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG2_REG, in comphy_rxauii_power_up()
1534 reg_set(hpipe_addr + HPIPE_DFE_REG0, 0x1 << HPIPE_DFE_RES_FORCE_OFFSET, in comphy_rxauii_power_up()
1537 reg_set(hpipe_addr + HPIPE_G1_SET_0_REG, in comphy_rxauii_power_up()
1547 reg_set(hpipe_addr + HPIPE_G1_SET_1_REG, data, mask); in comphy_rxauii_power_up()
1553 reg_set(hpipe_addr + HPIPE_DFE_F3_F5_REG, data, mask); in comphy_rxauii_power_up()
1558 reg_set(hpipe_addr + HPIPE_G1_SETTINGS_4_REG, data, mask); in comphy_rxauii_power_up()
1568 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG0_REG, data, mask); in comphy_rxauii_power_up()
1587 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, in comphy_rxauii_power_up()
1609 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask); in comphy_rxauii_power_up()
1626 reg_set(utmi_cfg_addr, 0x0 << UTMI_PHY_CFG_PU_OFFSET, in comphy_utmi_power_down()
1642 reg_set(usb_cfg_addr, data, mask); in comphy_utmi_power_down()
1651 reg_set(utmi_base_addr + UTMI_CTRL_STATUS0_REG, data, mask); in comphy_utmi_power_down()
1678 reg_set(utmi_base_addr + UTMI_PLL_CTRL_REG, data, mask); in comphy_utmi_phy_config()
1681 reg_set(utmi_base_addr + UTMI_CALIB_CTRL_REG, in comphy_utmi_phy_config()
1691 reg_set(utmi_base_addr + UTMI_TX_CH_CTRL_REG, data, mask); in comphy_utmi_phy_config()
1699 reg_set(utmi_base_addr + UTMI_RX_CH_CTRL0_REG, data, mask); in comphy_utmi_phy_config()
1707 reg_set(utmi_base_addr + UTMI_RX_CH_CTRL1_REG, data, mask); in comphy_utmi_phy_config()
1715 reg_set(utmi_base_addr + UTMI_CHGDTC_CTRL_REG, data, mask); in comphy_utmi_phy_config()
1732 reg_set(utmi_cfg_addr, 0x1 << UTMI_PHY_CFG_PU_OFFSET, in comphy_utmi_power_up()
1735 reg_set(utmi_base_addr + UTMI_CTRL_STATUS0_REG, in comphy_utmi_power_up()
1805 reg_set(cp110_utmi_data[i].usb_cfg_addr, in comphy_utmi_phy_init()
1835 reg_set(cp110_utmi_data[i].usb_cfg_addr, in comphy_utmi_phy_init()