Lines Matching +full:usb3 +full:- +full:phy
2 * Copyright (C) 2015-2016 Marvell International Ltd.
4 * SPDX-License-Identifier: GPL-2.0+
36 /*-----------------------------------------------------------*/
114 for (; timeout > 0; timeout--) { in comphy_poll_reg()
256 * 1. Select 40-bit data width width in comphy_sata_power_up()
262 * 2. Select reference clock and PHY mode (SATA) in comphy_sata_power_up()
287 * 5. Set vendor-specific configuration (??) in comphy_sata_power_up()
327 * 2. Set counter for 100us pulse in USB3 Host and Device in comphy_usb3_power_up()
335 /* set PRD_TXDEEMPH (3.5db de-emph) */ in comphy_usb3_power_up()
336 reg_set16((void __iomem *)LANE_CFG0_ADDR(USB3), 0x1, 0xFF); in comphy_usb3_power_up()
344 reg_set16((void __iomem *)LANE_CFG1_ADDR(USB3), 0x0, 0xFFFF); in comphy_usb3_power_up()
348 reg_set16((void __iomem *)LANE_CFG4_ADDR(USB3), in comphy_usb3_power_up()
355 reg_set16((void __iomem *)TEST_MODE_CTRL_ADDR(USB3), in comphy_usb3_power_up()
358 /* set Lane-to-Lane Bundle Clock Sampling Period = per PCLK cycles */ in comphy_usb3_power_up()
360 reg_set16((void __iomem *)GLOB_CLK_SRC_LO_ADDR(USB3), 0x0, 0xFF); in comphy_usb3_power_up()
363 reg_set16((void __iomem *)GEN2_SETTING_2_ADDR(USB3), g2_tx_ssc_amp, in comphy_usb3_power_up()
370 reg_set16((void __iomem *)GEN2_SETTING_3_ADDR(USB3), 0x0, 0xFFFF); in comphy_usb3_power_up()
377 reg_set16((void __iomem *)PWR_PLL_CTRL_ADDR(USB3), 0xFCA3, in comphy_usb3_power_up()
380 reg_set16((void __iomem *)PWR_PLL_CTRL_ADDR(USB3), 0xFCA2, in comphy_usb3_power_up()
387 reg_set16((void __iomem *)PWR_MGM_TIM1_ADDR(USB3), 0x10C, 0xFFFF); in comphy_usb3_power_up()
392 reg_set16((void __iomem *)UNIT_CTRL_ADDR(USB3), 0x60 | rb_idle_sync_en, in comphy_usb3_power_up()
398 reg_set16((void __iomem *)MISC_REG0_ADDR(USB3), 0xA00D | rb_clk500m_en, in comphy_usb3_power_up()
402 * 7. Set 20-bit data width in comphy_usb3_power_up()
404 reg_set16((void __iomem *)DIG_LB_EN_ADDR(USB3), 0x0400, 0xFFFF); in comphy_usb3_power_up()
409 reg_set16((void __iomem *)KVCO_CAL_CTRL_ADDR(USB3), in comphy_usb3_power_up()
416 reg_set16((void __iomem *)SYNC_PATTERN_ADDR(USB3), in comphy_usb3_power_up()
421 reg_set16((void __iomem *)SYNC_PATTERN_ADDR(USB3), in comphy_usb3_power_up()
428 reg_set16((void __iomem *)GLOB_PHY_CTRL0_ADDR(USB3), in comphy_usb3_power_up()
436 ret = comphy_poll_reg((void *)LANE_STAT1_ADDR(USB3), /* address */ in comphy_usb3_power_up()
442 printf("Failed to lock USB3 PLL\n"); in comphy_usb3_power_up()
497 * 1. PHY pull up and disable USB2 suspend in comphy_usb2_power_up()
509 * 3. Configure PHY charger detection in comphy_usb2_power_up()
588 * 4. Init PHY in comphy_emmc_power_up()
619 * All PHY register values are defined in full for 3.125Gbps in comphy_sgmii_phy_init()
651 * 1. Configure PHY to SATA/SAS mode by setting pin PIN_PIPE_SEL=0 in comphy_sgmii_power_up()
656 * 2. Reset PHY by setting PHY input port PIN_RESET=1. in comphy_sgmii_power_up()
657 * 3. Set PHY input port PIN_TX_IDLE=1, PIN_PU_IVREF=1 to keep in comphy_sgmii_power_up()
658 * PHY TXP/TXN output to idle state during PHY initialization in comphy_sgmii_power_up()
659 * 4. Set PHY input port PIN_PU_PLL=0, PIN_PU_RX=0, PIN_PU_TX=0. in comphy_sgmii_power_up()
667 * 5. Release reset to the PHY by setting PIN_RESET=0. in comphy_sgmii_power_up()
751 * group to get the related GEN table during real chip bring-up. in comphy_sgmii_power_up()
754 * 40 MHz. For REF clock 25 MHz the default values stored in PHY in comphy_sgmii_power_up()
757 debug("Running C-DPI phy init %s mode\n", in comphy_sgmii_power_up()
774 * 18. Check the PHY Polarity invert bit in comphy_sgmii_power_up()
783 * 19. Set PHY input ports PIN_PU_PLL, PIN_PU_TX and PIN_PU_RX to 1 in comphy_sgmii_power_up()
784 * to start PHY power up sequence. All the PHY register in comphy_sgmii_power_up()
786 * no register programming for normal PHY operation from this point. in comphy_sgmii_power_up()
793 * 20. Wait for PHY power up sequence to finish by checking output ports in comphy_sgmii_power_up()
802 printf("Failed to lock PLL for SGMII PHY %d\n", lane); in comphy_sgmii_power_up()
813 * 0 by the PHY. After RX initialization is done, PIN_RX_INIT_DONE in comphy_sgmii_power_up()
827 printf("Failed to init RX of SGMII PHY %d\n", lane); in comphy_sgmii_power_up()
837 const void *blob = gd->fdt_blob; in comphy_dedicated_phys_init()
844 * One is independendent and one is paired with USB3 port (OTG) in comphy_dedicated_phys_init()
848 blob, -1, "marvell,armada-3700-ehci"); in comphy_dedicated_phys_init()
851 blob, -1, "marvell,armada3700-xhci"); in comphy_dedicated_phys_init()
858 printf("Failed to initialize UTMI PHY\n"); in comphy_dedicated_phys_init()
860 debug("UTMI PHY init succeed\n"); in comphy_dedicated_phys_init()
870 node = fdt_node_offset_by_compatible(blob, -1, in comphy_dedicated_phys_init()
871 "marvell,armada-3700-ahci"); in comphy_dedicated_phys_init()
876 printf("Failed to initialize SATA PHY\n"); in comphy_dedicated_phys_init()
878 debug("SATA PHY init succeed\n"); in comphy_dedicated_phys_init()
886 node = fdt_node_offset_by_compatible(blob, -1, in comphy_dedicated_phys_init()
887 "marvell,armada-8k-sdhci"); in comphy_dedicated_phys_init()
890 blob, -1, "marvell,armada-3700-sdhci"); in comphy_dedicated_phys_init()
897 printf("Failed to initialize SDIO/eMMC PHY\n"); in comphy_dedicated_phys_init()
899 debug("SDIO/eMMC PHY init succeed\n"); in comphy_dedicated_phys_init()
914 u32 comphy_max_count = chip_cfg->comphy_lanes_count; in comphy_a3700_init()
923 comphy_map->type, comphy_map->invert); in comphy_a3700_init()
925 switch (comphy_map->type) { in comphy_a3700_init()
931 ret = comphy_pcie_power_up(comphy_map->speed, in comphy_a3700_init()
932 comphy_map->invert); in comphy_a3700_init()
937 ret = comphy_usb3_power_up(comphy_map->type, in comphy_a3700_init()
938 comphy_map->speed, in comphy_a3700_init()
939 comphy_map->invert); in comphy_a3700_init()
944 ret = comphy_sgmii_power_up(lane, comphy_map->speed, in comphy_a3700_init()
945 comphy_map->invert); in comphy_a3700_init()
955 printf("PLL is not locked - Failed to initialize lane %d\n", in comphy_a3700_init()