436 	struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;  in imx6_pcie_assert_core_reset()  local
439 		setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_PCIE_SW_RST);  in imx6_pcie_assert_core_reset()
445 	setbits_le32(&iomuxc_regs->gpr[12], IOMUXC_GPR12_TEST_POWERDOWN);  in imx6_pcie_assert_core_reset()
447 	setbits_le32(&iomuxc_regs->gpr[5], IOMUXC_GPR5_PCIE_BTNRST);  in imx6_pcie_assert_core_reset()
465 		gpr1 = readl(&iomuxc_regs->gpr[1]);  in imx6_pcie_assert_core_reset()
466 		gpr12 = readl(&iomuxc_regs->gpr[12]);  in imx6_pcie_assert_core_reset()
478 			writel(val, &iomuxc_regs->gpr[12]);  in imx6_pcie_assert_core_reset()
481 	setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_TEST_POWERDOWN);  in imx6_pcie_assert_core_reset()
482 	clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_REF_SSP_EN);  in imx6_pcie_assert_core_reset()
490 	struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;  in imx6_pcie_init_phy()  local
492 	clrbits_le32(&iomuxc_regs->gpr[12], IOMUXC_GPR12_APPS_LTSSM_ENABLE);  in imx6_pcie_init_phy()
494 	clrsetbits_le32(&iomuxc_regs->gpr[12],  in imx6_pcie_init_phy()
497 	clrsetbits_le32(&iomuxc_regs->gpr[12],  in imx6_pcie_init_phy()
502 	clrsetbits_le32(&iomuxc_regs->gpr[12],  in imx6_pcie_init_phy()
512 	       &iomuxc_regs->gpr[8]);  in imx6_pcie_init_phy()
571 	struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;  in imx6_pcie_deassert_core_reset()  local
578 		clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_PCIE_SW_RST);  in imx6_pcie_deassert_core_reset()
588 	clrbits_le32(&iomuxc_regs->gpr[12], IOMUXC_GPR12_TEST_POWERDOWN);  in imx6_pcie_deassert_core_reset()
590 	clrbits_le32(&iomuxc_regs->gpr[5], IOMUXC_GPR5_PCIE_BTNRST);  in imx6_pcie_deassert_core_reset()
593 	clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_TEST_POWERDOWN);  in imx6_pcie_deassert_core_reset()
594 	setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_REF_SSP_EN);  in imx6_pcie_deassert_core_reset()
604 	struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;  in imx_pcie_link_up()  local
626 	setbits_le32(&iomuxc_regs->gpr[12], IOMUXC_GPR12_APPS_LTSSM_ENABLE);  in imx_pcie_link_up()