29 void pciauto_setup_device(struct pci_controller *hose,  in pciauto_setup_device()  argument
48 	pci_hose_read_config_word(hose, dev, PCI_COMMAND, &cmdstat);  in pciauto_setup_device()
55 		pci_hose_write_config_dword(hose, dev, bar, 0xffffffff);  in pciauto_setup_device()
57 		pci_hose_read_config_dword(hose, dev, bar, &bar_response);  in pciauto_setup_device()
84 				pci_hose_write_config_dword(hose, dev, bar + 4,  in pciauto_setup_device()
87 				pci_hose_read_config_dword(hose, dev, bar + 4,  in pciauto_setup_device()
114 			pci_hose_write_config_dword(hose, dev, bar, (u32)bar_value);  in pciauto_setup_device()
119 				pci_hose_write_config_dword(hose, dev, bar, (u32)(bar_value>>32));  in pciauto_setup_device()
126 				pci_hose_write_config_dword(hose, dev, bar, 0x00000000);  in pciauto_setup_device()
142 	pci_hose_read_config_byte(hose, dev, PCI_HEADER_TYPE, &header_type);  in pciauto_setup_device()
147 		pci_hose_write_config_dword(hose, dev, rom_addr, 0xfffffffe);  in pciauto_setup_device()
148 		pci_hose_read_config_dword(hose, dev, rom_addr, &bar_response);  in pciauto_setup_device()
155 				pci_hose_write_config_dword(hose, dev, rom_addr,  in pciauto_setup_device()
165 	pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class);  in pciauto_setup_device()
169 	pci_hose_write_config_word(hose, dev, PCI_COMMAND, cmdstat);  in pciauto_setup_device()
170 	pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE,  in pciauto_setup_device()
172 	pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80);  in pciauto_setup_device()
175 void pciauto_prescan_setup_bridge(struct pci_controller *hose,  in pciauto_prescan_setup_bridge()  argument
183 	pci_mem = hose->pci_mem;  in pciauto_prescan_setup_bridge()
184 	pci_prefetch = hose->pci_prefetch;  in pciauto_prescan_setup_bridge()
185 	pci_io = hose->pci_io;  in pciauto_prescan_setup_bridge()
187 	pci_hose_read_config_word(hose, dev, PCI_COMMAND, &cmdstat);  in pciauto_prescan_setup_bridge()
188 	pci_hose_read_config_word(hose, dev, PCI_PREF_MEMORY_BASE,  in pciauto_prescan_setup_bridge()
193 	pci_hose_write_config_byte(hose, dev, PCI_PRIMARY_BUS,  in pciauto_prescan_setup_bridge()
194 				   PCI_BUS(dev) - hose->first_busno);  in pciauto_prescan_setup_bridge()
195 	pci_hose_write_config_byte(hose, dev, PCI_SECONDARY_BUS,  in pciauto_prescan_setup_bridge()
196 				   sub_bus - hose->first_busno);  in pciauto_prescan_setup_bridge()
197 	pci_hose_write_config_byte(hose, dev, PCI_SUBORDINATE_BUS, 0xff);  in pciauto_prescan_setup_bridge()
204 		pci_hose_write_config_word(hose, dev, PCI_MEMORY_BASE,  in pciauto_prescan_setup_bridge()
215 		pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_BASE,  in pciauto_prescan_setup_bridge()
219 			pci_hose_write_config_dword(hose, dev,  in pciauto_prescan_setup_bridge()
223 			pci_hose_write_config_dword(hose, dev,  in pciauto_prescan_setup_bridge()
231 		pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_BASE, 0x1000);  in pciauto_prescan_setup_bridge()
232 		pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT, 0x0);  in pciauto_prescan_setup_bridge()
234 			pci_hose_write_config_word(hose, dev, PCI_PREF_BASE_UPPER32, 0x0);  in pciauto_prescan_setup_bridge()
235 			pci_hose_write_config_word(hose, dev, PCI_PREF_LIMIT_UPPER32, 0x0);  in pciauto_prescan_setup_bridge()
243 		pci_hose_write_config_byte(hose, dev, PCI_IO_BASE,  in pciauto_prescan_setup_bridge()
245 		pci_hose_write_config_word(hose, dev, PCI_IO_BASE_UPPER16,  in pciauto_prescan_setup_bridge()
252 	pci_hose_write_config_word(hose, dev, PCI_COMMAND,  in pciauto_prescan_setup_bridge()
256 void pciauto_postscan_setup_bridge(struct pci_controller *hose,  in pciauto_postscan_setup_bridge()  argument
263 	pci_mem = hose->pci_mem;  in pciauto_postscan_setup_bridge()
264 	pci_prefetch = hose->pci_prefetch;  in pciauto_postscan_setup_bridge()
265 	pci_io = hose->pci_io;  in pciauto_postscan_setup_bridge()
268 	pci_hose_write_config_byte(hose, dev, PCI_SUBORDINATE_BUS,  in pciauto_postscan_setup_bridge()
269 				   sub_bus - hose->first_busno);  in pciauto_postscan_setup_bridge()
275 		pci_hose_write_config_word(hose, dev, PCI_MEMORY_LIMIT,  in pciauto_postscan_setup_bridge()
282 		pci_hose_read_config_word(hose, dev,  in pciauto_postscan_setup_bridge()
290 		pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT,  in pciauto_postscan_setup_bridge()
294 			pci_hose_write_config_dword(hose, dev,  in pciauto_postscan_setup_bridge()
298 			pci_hose_write_config_dword(hose, dev,  in pciauto_postscan_setup_bridge()
308 		pci_hose_write_config_byte(hose, dev, PCI_IO_LIMIT,  in pciauto_postscan_setup_bridge()
310 		pci_hose_write_config_word(hose, dev, PCI_IO_LIMIT_UPPER16,  in pciauto_postscan_setup_bridge()
320 int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)  in pciauto_config_device()  argument
329 	pci_mem = hose->pci_mem;  in pciauto_config_device()
330 	pci_prefetch = hose->pci_prefetch;  in pciauto_config_device()
331 	pci_io = hose->pci_io;  in pciauto_config_device()
333 	pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class);  in pciauto_config_device()
340 		pciauto_setup_device(hose, dev, 2, pci_mem,  in pciauto_config_device()
344 		hose->current_busno++;  in pciauto_config_device()
345 		pciauto_prescan_setup_bridge(hose, dev, hose->current_busno);  in pciauto_config_device()
350 		n = pci_hose_scan_bus(hose, hose->current_busno);  in pciauto_config_device()
354 		pciauto_postscan_setup_bridge(hose, dev, sub_bus);  in pciauto_config_device()
356 		sub_bus = hose->current_busno;  in pciauto_config_device()
364 		pciauto_setup_device(hose, dev, 0, pci_mem,  in pciauto_config_device()
370 		hose->current_busno++;  in pciauto_config_device()
388 		pciauto_setup_device(hose, dev, 0, hose->pci_mem,  in pciauto_config_device()
389 			hose->pci_prefetch, hose->pci_io);  in pciauto_config_device()
397 		pciauto_setup_device(hose, dev, 6, pci_mem,  in pciauto_config_device()