Lines Matching +full:0 +full:xfffffe00

11 #define GPIO_BASE	0x48
12 #define IO_BASE		0x4c
13 #define SBASE_ADDR	0x54
20 	*sbasep = sbase_addr & 0xfffffe00;  in pch9_get_spi_base()
22 	return 0;  in pch9_get_spi_base()
35 	 * GPIO base address register bit0 is reserved (read returns 0),  in pch9_get_gpio_base()
40 	if (base == 0x00000000 || base == 0xffffffff) {  in pch9_get_gpio_base()
48 	 * at the offset that we just read. Bit 0 indicates that it's  in pch9_get_gpio_base()
53 	return 0;  in pch9_get_gpio_base()
61 	if (base == 0x00000000 || base == 0xffffffff) {  in pch9_get_io_base()
68 	return 0;  in pch9_get_io_base()