73 	phys_addr_t *ra = ll_temac->sdma_reg_addr;  in ll_temac_collect_xlplb_sdma_reg_addr()  local
75 	ra[TX_NXTDESC_PTR]   = (phys_addr_t)&sdma_ctrl->tx_nxtdesc_ptr;  in ll_temac_collect_xlplb_sdma_reg_addr()
76 	ra[TX_CURBUF_ADDR]   = (phys_addr_t)&sdma_ctrl->tx_curbuf_addr;  in ll_temac_collect_xlplb_sdma_reg_addr()
77 	ra[TX_CURBUF_LENGTH] = (phys_addr_t)&sdma_ctrl->tx_curbuf_length;  in ll_temac_collect_xlplb_sdma_reg_addr()
78 	ra[TX_CURDESC_PTR]   = (phys_addr_t)&sdma_ctrl->tx_curdesc_ptr;  in ll_temac_collect_xlplb_sdma_reg_addr()
79 	ra[TX_TAILDESC_PTR]  = (phys_addr_t)&sdma_ctrl->tx_taildesc_ptr;  in ll_temac_collect_xlplb_sdma_reg_addr()
80 	ra[TX_CHNL_CTRL]     = (phys_addr_t)&sdma_ctrl->tx_chnl_ctrl;  in ll_temac_collect_xlplb_sdma_reg_addr()
81 	ra[TX_IRQ_REG]       = (phys_addr_t)&sdma_ctrl->tx_irq_reg;  in ll_temac_collect_xlplb_sdma_reg_addr()
82 	ra[TX_CHNL_STS]      = (phys_addr_t)&sdma_ctrl->tx_chnl_sts;  in ll_temac_collect_xlplb_sdma_reg_addr()
83 	ra[RX_NXTDESC_PTR]   = (phys_addr_t)&sdma_ctrl->rx_nxtdesc_ptr;  in ll_temac_collect_xlplb_sdma_reg_addr()
84 	ra[RX_CURBUF_ADDR]   = (phys_addr_t)&sdma_ctrl->rx_curbuf_addr;  in ll_temac_collect_xlplb_sdma_reg_addr()
85 	ra[RX_CURBUF_LENGTH] = (phys_addr_t)&sdma_ctrl->rx_curbuf_length;  in ll_temac_collect_xlplb_sdma_reg_addr()
86 	ra[RX_CURDESC_PTR]   = (phys_addr_t)&sdma_ctrl->rx_curdesc_ptr;  in ll_temac_collect_xlplb_sdma_reg_addr()
87 	ra[RX_TAILDESC_PTR]  = (phys_addr_t)&sdma_ctrl->rx_taildesc_ptr;  in ll_temac_collect_xlplb_sdma_reg_addr()
88 	ra[RX_CHNL_CTRL]     = (phys_addr_t)&sdma_ctrl->rx_chnl_ctrl;  in ll_temac_collect_xlplb_sdma_reg_addr()
89 	ra[RX_IRQ_REG]       = (phys_addr_t)&sdma_ctrl->rx_irq_reg;  in ll_temac_collect_xlplb_sdma_reg_addr()
90 	ra[RX_CHNL_STS]      = (phys_addr_t)&sdma_ctrl->rx_chnl_sts;  in ll_temac_collect_xlplb_sdma_reg_addr()
91 	ra[DMA_CONTROL_REG]  = (phys_addr_t)&sdma_ctrl->dma_control_reg;  in ll_temac_collect_xlplb_sdma_reg_addr()
99 	phys_addr_t *ra = ll_temac->sdma_reg_addr;  in ll_temac_sdma_error()  local
101 	err = ll_temac->in32(ra[TX_CHNL_STS]) & CHNL_STS_ERROR;  in ll_temac_sdma_error()
102 	err |= ll_temac->in32(ra[RX_CHNL_STS]) & CHNL_STS_ERROR;  in ll_temac_sdma_error()
112 	phys_addr_t *ra = ll_temac->sdma_reg_addr;  in ll_temac_init_sdma()  local
141 	ll_temac->out32(ra[RX_CURDESC_PTR], (int)&cdmac_bd.rx[rx_idx]);  in ll_temac_init_sdma()
142 	ll_temac->out32(ra[RX_TAILDESC_PTR], (int)&cdmac_bd.rx[rx_idx]);  in ll_temac_init_sdma()
151 	phys_addr_t *ra = ll_temac->sdma_reg_addr;  in ll_temac_halt_sdma()  local
162 	ll_temac->out32(ra[DMA_CONTROL_REG], DMA_CONTROL_RESET);  in ll_temac_halt_sdma()
163 	while (timeout && (ll_temac->in32(ra[DMA_CONTROL_REG])  in ll_temac_halt_sdma()
181 	phys_addr_t *ra = ll_temac->sdma_reg_addr;  in ll_temac_reset_sdma()  local
188 	r = ll_temac->in32(ra[TX_CHNL_CTRL]);  in ll_temac_reset_sdma()
190 	ll_temac->out32(ra[TX_CHNL_CTRL], r);  in ll_temac_reset_sdma()
192 	r = ll_temac->in32(ra[RX_CHNL_CTRL]);  in ll_temac_reset_sdma()
194 	ll_temac->out32(ra[RX_CHNL_CTRL], r);  in ll_temac_reset_sdma()
197 	ll_temac->out32(ra[TX_IRQ_REG], IRQ_REG_IRQ_MASK);  in ll_temac_reset_sdma()
198 	ll_temac->out32(ra[RX_IRQ_REG], IRQ_REG_IRQ_MASK);  in ll_temac_reset_sdma()
201 	ll_temac->out32(ra[DMA_CONTROL_REG],  in ll_temac_reset_sdma()
217 	phys_addr_t *ra = ll_temac->sdma_reg_addr;  in ll_temac_recv_sdma()  local
256 	ll_temac->out32(ra[RX_CURDESC_PTR], (int)&cdmac_bd.rx[rx_idx]);  in ll_temac_recv_sdma()
257 	ll_temac->out32(ra[RX_TAILDESC_PTR], (int)&cdmac_bd.rx[rx_idx]);  in ll_temac_recv_sdma()
270 	phys_addr_t *ra = ll_temac->sdma_reg_addr;  in ll_temac_send_sdma()  local
289 	ll_temac->out32(ra[TX_CURDESC_PTR], (int)tx_dp);  in ll_temac_send_sdma()
290 	ll_temac->out32(ra[TX_TAILDESC_PTR], (int)tx_dp);  in ll_temac_send_sdma()