Lines Matching full:registers

45 	/* direct soft registers (low part) */
54 	/* hard TEMAC registers */
59 	/* direct soft registers (high part) */
66 /* Reset and Address Filter Registers (raf), [1] p25 */
82 /* Transmit Pause Frame Registers (tpf), [1] p28 */
86 /* Transmit Inter Frame Gap Adjustment Registers (ifgp), [1] p28 */
90 /* Interrupt Status, Pending, Enable Registers (is, ip, ie), [1] p29-33 */
100 /* Transmit, Receive VLAN Tag Registers (ttag, rtag), [1] p34-35 */
138 /* Unicast Address Word Lower, Upper Registers (uawl, uawu), [1] p35-36 */
144 /* VLAN TPID Word 0, 1 Registers (tpid0, tpid1), [1] p37 */
160  *	page 23, PLB Indirectly Addressable TEMAC Registers
181 /* Receive Configuration Word 0, 1 Registers (RCW0, RCW1), [1] p50-51 */
194 /* Transmit Configuration Registers (TC), [1] p52 */
203 /* Flow Control Configuration Registers (FCC), [1] p54 */
207 /* Ethernet MAC Mode Configuration Registers (EMMC), [1] p54 */
220 /* RGMII/SGMII Configuration Registers (PHYC), [1] p56 */
234 /* Management Configuration Registers (MC), [1] p57 */
250 /* Unicast Address Word 0, 1 Registers (UAW0, UAW1), [1] p58-59 */
256 /* Multicast Address Word 0, 1 Registers (MAW0, MAW1), [1] p60 */
265 /* Address Filter Mode Registers (AFM), [1] p63 */
268 /* Interrupt Status, Enable Registers (TIS, TIE), [1] p63-65 */
277 /* MII Management Write Data Registers (MIIMWD), [1] p66 */