Lines Matching refs:VSC9953_MAX_PORTS

388 	for (i = 0; i < VSC9953_MAX_PORTS; i++)  in vsc9953_port_all_vlan_pvid_set()
419 for (i = 0; i < VSC9953_MAX_PORTS; i++) in vsc9953_port_all_vlan_aware_set()
454 for (i = 0; i < VSC9953_MAX_PORTS; i++) in vsc9953_port_all_vlan_poncnt_set()
633 for (i = 0; i < VSC9953_MAX_PORTS; i++) in vsc9953_port_all_vlan_egress_untagged_set()
1129 int rc[VSC9953_MAX_PORTS]; in vsc9953_mac_table_show()
1130 enum port_learn_mode mode[VSC9953_MAX_PORTS]; in vsc9953_mac_table_show()
1144 for (i = 0; i < VSC9953_MAX_PORTS; i++) { in vsc9953_mac_table_show()
1221 for (i = 0; i < VSC9953_MAX_PORTS; i++) { in vsc9953_mac_table_show()
1355 int rc[VSC9953_MAX_PORTS]; in vsc9953_mac_table_age()
1356 enum port_learn_mode mode[VSC9953_MAX_PORTS]; in vsc9953_mac_table_age()
1377 for (i = 0; i < VSC9953_MAX_PORTS; i++) { in vsc9953_mac_table_age()
1402 for (i = 0; i < VSC9953_MAX_PORTS; i++) { in vsc9953_mac_table_age()
1557 u8 aggr_membr[VSC9953_MAX_PORTS]) in vsc9953_aggr_grp_members_get() argument
1562 for (port_no = 0; port_no < VSC9953_MAX_PORTS; port_no++) { in vsc9953_aggr_grp_members_get()
1587 for (i = 0; i < VSC9953_MAX_PORTS; i++) { in vsc9953_update_dest_members_masks()
1617 for (i = 0; i < VSC9953_MAX_PORTS + 1; i++) { in vsc9953_update_source_members_masks()
1684 static u32 vsc9953_aggr_membr_bitfield_get(u8 member[VSC9953_MAX_PORTS]) in vsc9953_aggr_membr_bitfield_get() argument
1689 for (i = 0; i < VSC9953_MAX_PORTS; i++) { in vsc9953_aggr_membr_bitfield_get()
1699 u8 member_old[VSC9953_MAX_PORTS], in vsc9953_update_members_masks() argument
1700 u8 member_new[VSC9953_MAX_PORTS]) in vsc9953_update_members_masks() argument
1716 u8 aggr_membr_old[VSC9953_MAX_PORTS]; in vsc9953_port_aggr_grp_set()
1717 u8 aggr_membr_new[VSC9953_MAX_PORTS]; in vsc9953_port_aggr_grp_set()
1777 for (i = 0; i < VSC9953_MAX_PORTS; i++) in vsc9953_port_status_key_func()
1800 for (i = 0; i < VSC9953_MAX_PORTS; i++) in vsc9953_port_config_key_func()
1804 for (i = 0; i < VSC9953_MAX_PORTS; i++) in vsc9953_port_config_key_func()
1822 for (i = 0; i < VSC9953_MAX_PORTS; i++) in vsc9953_port_stats_key_func()
1841 for (i = 0; i < VSC9953_MAX_PORTS; i++) in vsc9953_port_stats_clear_key_func()
1873 for (i = 0; i < VSC9953_MAX_PORTS; i++) { in vsc9953_learn_show_key_func()
1914 for (i = 0; i < VSC9953_MAX_PORTS; i++) in vsc9953_learn_set_key_func()
2023 for (i = 0; i < VSC9953_MAX_PORTS; i++) { in vsc9953_pvid_show_key_func()
2070 for (i = 0; i < VSC9953_MAX_PORTS; i++) in vsc9953_vlan_show_key_func()
2111 for (i = 0; i < VSC9953_MAX_PORTS; i++) in vsc9953_vlan_set_key_func()
2131 for (i = 0; i < VSC9953_MAX_PORTS; i++) in vsc9953_port_untag_show_key_func()
2163 for (i = 0; i < VSC9953_MAX_PORTS; i++) in vsc9953_port_untag_set_key_func()
2196 for (i = 0; i < VSC9953_MAX_PORTS; i++) { in vsc9953_egr_vlan_tag_show_key_func()
2237 for (i = 0; i < VSC9953_MAX_PORTS; i++) in vsc9953_egr_vlan_tag_set_key_func()
2303 for (i = 0; i < VSC9953_MAX_PORTS; i++) { in vsc9953_ingr_fltr_show_key_func()
2338 for (i = 0; i < VSC9953_MAX_PORTS; i++) in vsc9953_ingr_fltr_set_key_func()
2362 for (i = 0; i < VSC9953_MAX_PORTS; i++) { in vsc9953_port_aggr_show_key_func()
2399 for (i = 0; i < VSC9953_MAX_PORTS; i++) { in vsc9953_port_aggr_set_key_func()
2524 for (i = 0; i < VSC9953_MAX_PORTS; i++) { in vsc9953_init()