90 		sh_eth_write(eth, EDTRR_TRNS, EDTRR);  in sh_eth_send()
151 		sh_eth_write(eth, EDRRR_R, EDRRR);  in sh_eth_recv()
162 	sh_eth_write(eth, EDSR_ENALL, EDSR);  in sh_eth_reset()
165 	sh_eth_write(eth, EDMR_SRST, EDMR);  in sh_eth_reset()
179 	sh_eth_write(eth, sh_eth_read(eth, EDMR) | EDMR_SRST, EDMR);  in sh_eth_reset()
181 	sh_eth_write(eth, sh_eth_read(eth, EDMR) & ~EDMR_SRST, EDMR);  in sh_eth_reset()
227 	sh_eth_write(eth, ADDR_TO_PHY(port_info->tx_desc_base), TDLAR);  in sh_eth_tx_desc_init()
229 	sh_eth_write(eth, ADDR_TO_PHY(port_info->tx_desc_base), TDFAR);  in sh_eth_tx_desc_init()
230 	sh_eth_write(eth, ADDR_TO_PHY(cur_tx_desc), TDFXR);  in sh_eth_tx_desc_init()
231 	sh_eth_write(eth, 0x01, TDFFR);/* Last discriptor bit */  in sh_eth_tx_desc_init()
294 	sh_eth_write(eth, ADDR_TO_PHY(port_info->rx_desc_base), RDLAR);  in sh_eth_rx_desc_init()
296 	sh_eth_write(eth, ADDR_TO_PHY(port_info->rx_desc_base), RDFAR);  in sh_eth_rx_desc_init()
297 	sh_eth_write(eth, ADDR_TO_PHY(cur_rx_desc), RDFXR);  in sh_eth_rx_desc_init()
298 	sh_eth_write(eth, RDFFR_RDLF, RDFFR);  in sh_eth_rx_desc_init()
383 	sh_eth_write(eth, (sh_eth_read(eth, EDMR) & ~EMDR_DESC_R) |  in sh_eth_config()
386 	sh_eth_write(eth, 0, EESIPR);  in sh_eth_config()
387 	sh_eth_write(eth, 0, TRSCER);  in sh_eth_config()
388 	sh_eth_write(eth, 0, TFTR);  in sh_eth_config()
389 	sh_eth_write(eth, (FIFO_SIZE_T | FIFO_SIZE_R), FDR);  in sh_eth_config()
390 	sh_eth_write(eth, RMCR_RST, RMCR);  in sh_eth_config()
392 	sh_eth_write(eth, 0, RPADIR);  in sh_eth_config()
394 	sh_eth_write(eth, (FIFO_F_D_RFF | FIFO_F_D_RFD), FCFTR);  in sh_eth_config()
397 	sh_eth_write(eth, 0, ECSIPR);  in sh_eth_config()
402 	sh_eth_write(eth, val, MAHR);  in sh_eth_config()
405 	sh_eth_write(eth, val, MALR);  in sh_eth_config()
407 	sh_eth_write(eth, RFLR_RFL_MIN, RFLR);  in sh_eth_config()
409 	sh_eth_write(eth, 0, PIPR);  in sh_eth_config()
412 	sh_eth_write(eth, APR_AP, APR);  in sh_eth_config()
413 	sh_eth_write(eth, MPR_MP, MPR);  in sh_eth_config()
414 	sh_eth_write(eth, TPAUSER_TPAUSE, TPAUSER);  in sh_eth_config()
418 	sh_eth_write(eth, CONFIG_SH_ETHER_SH7734_MII, RMII_MII);  in sh_eth_config()
421 	sh_eth_write(eth, sh_eth_read(eth, RMIIMR) | 0x1, RMIIMR);  in sh_eth_config()
442 		sh_eth_write(eth, GECMR_100B, GECMR);  in sh_eth_config()
444 		sh_eth_write(eth, 1, RTRATE);  in sh_eth_config()
453 		sh_eth_write(eth, GECMR_10B, GECMR);  in sh_eth_config()
455 		sh_eth_write(eth, 0, RTRATE);  in sh_eth_config()
461 		sh_eth_write(eth, GECMR_1000B, GECMR);  in sh_eth_config()
468 		sh_eth_write(eth, val | (ECMR_CHG_DM|ECMR_RE|ECMR_TE|ECMR_DM),  in sh_eth_config()
472 		sh_eth_write(eth, val | (ECMR_CHG_DM|ECMR_RE|ECMR_TE), ECMR);  in sh_eth_config()
487 	sh_eth_write(eth, EDRRR_R, EDRRR);  in sh_eth_start()
492 	sh_eth_write(eth, ~EDRRR_R, EDRRR);  in sh_eth_stop()
607 	sh_eth_write(eth, sh_eth_read(eth, PIR) | PIR_MMD, PIR);  in sh_eth_bb_mdio_active()
616 	sh_eth_write(eth, sh_eth_read(eth, PIR) & ~PIR_MMD, PIR);  in sh_eth_bb_mdio_tristate()
626 		sh_eth_write(eth, sh_eth_read(eth, PIR) | PIR_MDO, PIR);  in sh_eth_bb_set_mdio()
628 		sh_eth_write(eth, sh_eth_read(eth, PIR) & ~PIR_MDO, PIR);  in sh_eth_bb_set_mdio()
647 		sh_eth_write(eth, sh_eth_read(eth, PIR) | PIR_MDC, PIR);  in sh_eth_bb_set_mdc()
649 		sh_eth_write(eth, sh_eth_read(eth, PIR) & ~PIR_MDC, PIR);  in sh_eth_bb_set_mdc()