101 #define RTL_W32(reg, val32)	writel((val32), ioaddr + (reg))  macro
356 	RTL_W32(PHYAR, 0x80000000 | (RegAddr & 0xFF) << 16 | value);  in mdio_write()
373 	RTL_W32(PHYAR, 0x0 | (RegAddr & 0xFF) << 16);  in mdio_read()
713 	RTL_W32(RxConfig, tmp);  in rtl8169_set_rx_mode()
714 	RTL_W32(MAR0 + 0, mc_filter[0]);  in rtl8169_set_rx_mode()
715 	RTL_W32(MAR0 + 4, mc_filter[1]);  in rtl8169_set_rx_mode()
758 	RTL_W32(RxConfig, i);  in rtl8169_hw_start()
761 	RTL_W32(TxConfig, (TX_DMA_BURST << TxDMAShift) |  in rtl8169_hw_start()
768 	RTL_W32(TxDescStartAddrLow, dm_pci_mem_to_phys(dev,  in rtl8169_hw_start()
771 	RTL_W32(TxDescStartAddrLow, pci_mem_to_phys(dev,  in rtl8169_hw_start()
774 	RTL_W32(TxDescStartAddrHigh, (unsigned long)0);  in rtl8169_hw_start()
776 	RTL_W32(RxDescStartAddrLow, dm_pci_mem_to_phys(  in rtl8169_hw_start()
779 	RTL_W32(RxDescStartAddrLow, pci_mem_to_phys(  in rtl8169_hw_start()
782 	RTL_W32(RxDescStartAddrHigh, (unsigned long)0);  in rtl8169_hw_start()
791 	RTL_W32(RxMissed, 0);  in rtl8169_hw_start()
925 	RTL_W32(RxMissed, 0);  in rtl_halt_common()