58 	struct pic32_emac_regs *emac_p = priv->emac_regs;  in pic32_mii_init()  local
76 	writel(EMAC_SOFTRESET, &emac_p->cfg1.set); /* reset assert */  in pic32_mii_init()
78 	writel(EMAC_SOFTRESET, &emac_p->cfg1.clr); /* reset deassert */  in pic32_mii_init()
82 		writel(EMAC_RMII_RESET, &emac_p->supp.set);  in pic32_mii_init()
84 		writel(EMAC_RMII_RESET, &emac_p->supp.clr);  in pic32_mii_init()
87 	return pic32_mdio_init(PIC32_MDIO_NAME, (ulong)&emac_p->mii);  in pic32_mii_init()
131 	struct pic32_emac_regs *emac_p = priv->emac_regs;  in pic32_mac_adjust_link()  local
139 		writel(EMAC_FULLDUP, &emac_p->cfg2.set);  in pic32_mac_adjust_link()
140 		writel(FULLDUP_GAP_TIME, &emac_p->ipgt.raw);  in pic32_mac_adjust_link()
142 		writel(EMAC_FULLDUP, &emac_p->cfg2.clr);  in pic32_mac_adjust_link()
143 		writel(HALFDUP_GAP_TIME, &emac_p->ipgt.raw);  in pic32_mac_adjust_link()
148 		writel(EMAC_RMII_SPD100, &emac_p->supp.set);  in pic32_mac_adjust_link()
151 		writel(EMAC_RMII_SPD100, &emac_p->supp.clr);  in pic32_mac_adjust_link()
168 	struct pic32_emac_regs *emac_p = priv->emac_regs;  in pic32_mac_init()  local
173 	writel(v, &emac_p->cfg1.raw);  in pic32_mac_init()
177 	writel(v, &emac_p->cfg2.raw);  in pic32_mac_init()
180 	writel(HALFDUP_GAP_TIME, &emac_p->ipgt.raw);  in pic32_mac_init()
183 	writel(0xc12, &emac_p->ipgr.raw);  in pic32_mac_init()
186 	writel(0x370f, &emac_p->clrt.raw);  in pic32_mac_init()
189 	writel(0x600, &emac_p->maxf.raw);  in pic32_mac_init()
192 	writel(macaddr[0] | (macaddr[1] << 8), &emac_p->sa2.raw);  in pic32_mac_init()
193 	writel(macaddr[2] | (macaddr[3] << 8), &emac_p->sa1.raw);  in pic32_mac_init()
194 	writel(macaddr[4] | (macaddr[5] << 8), &emac_p->sa0.raw);  in pic32_mac_init()
197 	writel(EMAC_RMII_SPD100, &emac_p->supp.clr);  in pic32_mac_init()
216 	struct pic32_emac_regs *emac_p = priv->emac_regs;  in pic32_mac_reset()  local
220 	writel(EMAC_SOFTRESET, &emac_p->cfg1.raw);  in pic32_mac_reset()
224 	writel(0, &emac_p->cfg1.raw);  in pic32_mac_reset()
353 	struct pic32_emac_regs *emac_p = priv->emac_regs;  in pic32_eth_stop()  local
367 	writel(EMAC_SOFTRESET, &emac_p->cfg1.raw);  in pic32_eth_stop()
370 	writel(0, &emac_p->cfg1.raw);  in pic32_eth_stop()