Lines Matching refs:val
225 int val; in mv88e61xx_smi_wait() local
229 val = bus->read(bus, smi_addr, MDIO_DEVAD_NONE, SMI_CMD_REG); in mv88e61xx_smi_wait()
230 if (val >= 0 && (val & SMI_BUSY) == 0) in mv88e61xx_smi_wait()
293 u16 val) in mv88e61xx_reg_write() argument
303 val); in mv88e61xx_reg_write()
313 SMI_DATA_REG, val); in mv88e61xx_reg_write()
333 int val; in mv88e61xx_phy_wait() local
337 val = mv88e61xx_reg_read(phydev, DEVADDR_GLOBAL_2, in mv88e61xx_phy_wait()
339 if (val >= 0 && (val & SMI_BUSY) == 0) in mv88e61xx_phy_wait()
404 int reg, u16 val) in mv88e61xx_phy_write() argument
407 MDIO_DEVAD_NONE, reg, val); in mv88e61xx_phy_write()
416 u16 val) in mv88e61xx_port_write() argument
418 return mv88e61xx_reg_write(phydev, DEVADDR_PORT(port), reg, val); in mv88e61xx_port_write()
520 int val; in mv88e61xx_switch_reset() local
525 val = mv88e61xx_port_read(phydev, port, PORT_REG_CTRL); in mv88e61xx_switch_reset()
526 if (val < 0) in mv88e61xx_switch_reset()
527 return val; in mv88e61xx_switch_reset()
528 val = bitfield_replace(val, PORT_REG_CTRL_PSTATE_SHIFT, in mv88e61xx_switch_reset()
531 val = mv88e61xx_port_write(phydev, port, PORT_REG_CTRL, val); in mv88e61xx_switch_reset()
532 if (val < 0) in mv88e61xx_switch_reset()
533 return val; in mv88e61xx_switch_reset()
540 val = mv88e61xx_reg_read(phydev, DEVADDR_GLOBAL_1, GLOBAL1_CTRL); in mv88e61xx_switch_reset()
541 if (val < 0) in mv88e61xx_switch_reset()
542 return val; in mv88e61xx_switch_reset()
543 val |= GLOBAL1_CTRL_SWRESET; in mv88e61xx_switch_reset()
544 val = mv88e61xx_reg_write(phydev, DEVADDR_GLOBAL_1, in mv88e61xx_switch_reset()
545 GLOBAL1_CTRL, val); in mv88e61xx_switch_reset()
546 if (val < 0) in mv88e61xx_switch_reset()
547 return val; in mv88e61xx_switch_reset()
551 val = mv88e61xx_reg_read(phydev, DEVADDR_GLOBAL_1, in mv88e61xx_switch_reset()
553 if (val >= 0 && ((val & GLOBAL1_CTRL_SWRESET) == 0)) in mv88e61xx_switch_reset()
565 int val; in mv88e61xx_serdes_init() local
567 val = mv88e61xx_set_page(phydev, DEVADDR_SERDES, PHY_PAGE_SERDES); in mv88e61xx_serdes_init()
568 if (val < 0) in mv88e61xx_serdes_init()
569 return val; in mv88e61xx_serdes_init()
572 val = mv88e61xx_phy_read(phydev, DEVADDR_SERDES, MII_BMCR); in mv88e61xx_serdes_init()
573 if (val < 0) in mv88e61xx_serdes_init()
574 return val; in mv88e61xx_serdes_init()
575 val &= ~(BMCR_PDOWN); in mv88e61xx_serdes_init()
576 val = mv88e61xx_phy_write(phydev, DEVADDR_SERDES, MII_BMCR, val); in mv88e61xx_serdes_init()
577 if (val < 0) in mv88e61xx_serdes_init()
578 return val; in mv88e61xx_serdes_init()
585 int val; in mv88e61xx_port_enable() local
587 val = mv88e61xx_port_read(phydev, port, PORT_REG_CTRL); in mv88e61xx_port_enable()
588 if (val < 0) in mv88e61xx_port_enable()
589 return val; in mv88e61xx_port_enable()
590 val = bitfield_replace(val, PORT_REG_CTRL_PSTATE_SHIFT, in mv88e61xx_port_enable()
593 val = mv88e61xx_port_write(phydev, port, PORT_REG_CTRL, val); in mv88e61xx_port_enable()
594 if (val < 0) in mv88e61xx_port_enable()
595 return val; in mv88e61xx_port_enable()
603 int val; in mv88e61xx_port_set_vlan() local
606 val = mv88e61xx_port_read(phydev, port, PORT_REG_VLAN_ID); in mv88e61xx_port_set_vlan()
607 if (val < 0) in mv88e61xx_port_set_vlan()
608 return val; in mv88e61xx_port_set_vlan()
609 val = bitfield_replace(val, PORT_REG_VLAN_ID_DEF_VID_SHIFT, in mv88e61xx_port_set_vlan()
612 val = mv88e61xx_port_write(phydev, port, PORT_REG_VLAN_ID, val); in mv88e61xx_port_set_vlan()
613 if (val < 0) in mv88e61xx_port_set_vlan()
614 return val; in mv88e61xx_port_set_vlan()
617 val = mv88e61xx_port_read(phydev, port, PORT_REG_VLAN_MAP); in mv88e61xx_port_set_vlan()
618 if (val < 0) in mv88e61xx_port_set_vlan()
619 return val; in mv88e61xx_port_set_vlan()
620 val = bitfield_replace(val, PORT_REG_VLAN_MAP_TABLE_SHIFT, in mv88e61xx_port_set_vlan()
623 val = mv88e61xx_port_write(phydev, port, PORT_REG_VLAN_MAP, val); in mv88e61xx_port_set_vlan()
624 if (val < 0) in mv88e61xx_port_set_vlan()
625 return val; in mv88e61xx_port_set_vlan()
633 int val; in mv88e61xx_read_port_config() local
636 val = mv88e61xx_port_read(phydev, port, PORT_REG_STATUS); in mv88e61xx_read_port_config()
637 if (val < 0) in mv88e61xx_read_port_config()
638 return val; in mv88e61xx_read_port_config()
639 if (!(val & PORT_REG_STATUS_LINK)) { in mv88e61xx_read_port_config()
644 val = mv88e61xx_port_read(phydev, port, PORT_REG_PHYS_CTRL); in mv88e61xx_read_port_config()
645 if (val < 0) in mv88e61xx_read_port_config()
646 return val; in mv88e61xx_read_port_config()
647 val |= (PORT_REG_PHYS_CTRL_LINK_FORCE | in mv88e61xx_read_port_config()
649 val = mv88e61xx_port_write(phydev, port, PORT_REG_PHYS_CTRL, in mv88e61xx_read_port_config()
650 val); in mv88e61xx_read_port_config()
651 if (val < 0) in mv88e61xx_read_port_config()
652 return val; in mv88e61xx_read_port_config()
656 val = mv88e61xx_port_read(phydev, port, in mv88e61xx_read_port_config()
658 if (val < 0) { in mv88e61xx_read_port_config()
662 if (val & PORT_REG_STATUS_LINK) in mv88e61xx_read_port_config()
672 if (val & PORT_REG_STATUS_DUPLEX) in mv88e61xx_read_port_config()
677 val = bitfield_extract(val, PORT_REG_STATUS_SPEED_SHIFT, in mv88e61xx_read_port_config()
679 switch (val) { in mv88e61xx_read_port_config()
695 val = mv88e61xx_port_read(phydev, port, PORT_REG_PHYS_CTRL); in mv88e61xx_read_port_config()
696 if (val < 0) in mv88e61xx_read_port_config()
697 return val; in mv88e61xx_read_port_config()
698 val &= ~(PORT_REG_PHYS_CTRL_LINK_FORCE | in mv88e61xx_read_port_config()
700 val = mv88e61xx_port_write(phydev, port, PORT_REG_PHYS_CTRL, in mv88e61xx_read_port_config()
701 val); in mv88e61xx_read_port_config()
702 if (val < 0) in mv88e61xx_read_port_config()
703 return val; in mv88e61xx_read_port_config()
711 int val; in mv88e61xx_set_cpu_port() local
714 val = mv88e61xx_reg_read(phydev, DEVADDR_GLOBAL_1, GLOBAL1_MON_CTRL); in mv88e61xx_set_cpu_port()
715 if (val < 0) in mv88e61xx_set_cpu_port()
716 return val; in mv88e61xx_set_cpu_port()
717 val = bitfield_replace(val, GLOBAL1_MON_CTRL_CPUDEST_SHIFT, in mv88e61xx_set_cpu_port()
720 val = mv88e61xx_reg_write(phydev, DEVADDR_GLOBAL_1, in mv88e61xx_set_cpu_port()
721 GLOBAL1_MON_CTRL, val); in mv88e61xx_set_cpu_port()
722 if (val < 0) in mv88e61xx_set_cpu_port()
723 return val; in mv88e61xx_set_cpu_port()
726 val = PORT_MASK & ~(1 << CONFIG_MV88E61XX_CPU_PORT); in mv88e61xx_set_cpu_port()
727 val = mv88e61xx_port_set_vlan(phydev, CONFIG_MV88E61XX_CPU_PORT, val); in mv88e61xx_set_cpu_port()
728 if (val < 0) in mv88e61xx_set_cpu_port()
729 return val; in mv88e61xx_set_cpu_port()
732 val = mv88e61xx_port_enable(phydev, CONFIG_MV88E61XX_CPU_PORT); in mv88e61xx_set_cpu_port()
733 if (val < 0) in mv88e61xx_set_cpu_port()
734 return val; in mv88e61xx_set_cpu_port()
736 val = mv88e61xx_read_port_config(phydev, CONFIG_MV88E61XX_CPU_PORT); in mv88e61xx_set_cpu_port()
737 if (val < 0) in mv88e61xx_set_cpu_port()
738 return val; in mv88e61xx_set_cpu_port()
742 val = mv88e61xx_get_cmode(phydev, CONFIG_MV88E61XX_CPU_PORT); in mv88e61xx_set_cpu_port()
743 if (val < 0) in mv88e61xx_set_cpu_port()
744 return val; in mv88e61xx_set_cpu_port()
745 if (val == PORT_REG_STATUS_CMODE_100BASE_X || in mv88e61xx_set_cpu_port()
746 val == PORT_REG_STATUS_CMODE_1000BASE_X || in mv88e61xx_set_cpu_port()
747 val == PORT_REG_STATUS_CMODE_SGMII) { in mv88e61xx_set_cpu_port()
748 val = mv88e61xx_serdes_init(phydev); in mv88e61xx_set_cpu_port()
749 if (val < 0) in mv88e61xx_set_cpu_port()
750 return val; in mv88e61xx_set_cpu_port()
780 int val; in mv88e61xx_phy_enable() local
782 val = mv88e61xx_phy_read(phydev, phy, MII_BMCR); in mv88e61xx_phy_enable()
783 if (val < 0) in mv88e61xx_phy_enable()
784 return val; in mv88e61xx_phy_enable()
785 val &= ~(BMCR_PDOWN); in mv88e61xx_phy_enable()
786 val = mv88e61xx_phy_write(phydev, phy, MII_BMCR, val); in mv88e61xx_phy_enable()
787 if (val < 0) in mv88e61xx_phy_enable()
788 return val; in mv88e61xx_phy_enable()
795 int val; in mv88e61xx_phy_setup() local
801 val = mv88e61xx_phy_read(phydev, phy, PHY_REG_CTRL1); in mv88e61xx_phy_setup()
802 if (val < 0) in mv88e61xx_phy_setup()
803 return val; in mv88e61xx_phy_setup()
804 val = bitfield_replace(val, PHY_REG_CTRL1_ENERGY_DET_SHIFT, in mv88e61xx_phy_setup()
807 val = mv88e61xx_phy_write(phydev, phy, PHY_REG_CTRL1, val); in mv88e61xx_phy_setup()
808 if (val < 0) in mv88e61xx_phy_setup()
809 return val; in mv88e61xx_phy_setup()
816 int val; in mv88e61xx_fixed_port_setup() local
818 val = mv88e61xx_port_read(phydev, port, PORT_REG_PHYS_CTRL); in mv88e61xx_fixed_port_setup()
819 if (val < 0) in mv88e61xx_fixed_port_setup()
820 return val; in mv88e61xx_fixed_port_setup()
822 val &= ~(PORT_REG_PHYS_CTRL_SPD_MASK | in mv88e61xx_fixed_port_setup()
824 val |= PORT_REG_PHYS_CTRL_PCS_AN_EN | in mv88e61xx_fixed_port_setup()
832 val); in mv88e61xx_fixed_port_setup()
837 int val; in mv88e61xx_phy_config_port() local
839 val = mv88e61xx_port_enable(phydev, phy); in mv88e61xx_phy_config_port()
840 if (val < 0) in mv88e61xx_phy_config_port()
841 return val; in mv88e61xx_phy_config_port()
843 val = mv88e61xx_port_set_vlan(phydev, phy, in mv88e61xx_phy_config_port()
845 if (val < 0) in mv88e61xx_phy_config_port()
846 return val; in mv88e61xx_phy_config_port()
967 int val; in mv88e61xx_phy_is_connected() local
969 val = mv88e61xx_phy_read(phydev, phydev->addr, PHY_REG_STATUS1); in mv88e61xx_phy_is_connected()
970 if (val < 0) in mv88e61xx_phy_is_connected()
978 return (val & PHY_REG_STATUS1_ENERGY) == 0; in mv88e61xx_phy_is_connected()
1052 int val; in get_phy_id() local
1063 val = mv88e61xx_phy_read_indirect(&temp_mii, 0, devad, MII_PHYSID1); in get_phy_id()
1064 if (val < 0) in get_phy_id()
1067 *phy_id = val << 16; in get_phy_id()
1069 val = mv88e61xx_phy_read_indirect(&temp_mii, 0, devad, MII_PHYSID2); in get_phy_id()
1070 if (val < 0) in get_phy_id()
1073 *phy_id |= (val & 0xffff); in get_phy_id()