Lines Matching +full:bit +full:- +full:banged
3 * Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
8 * SPDX-License-Identifier: GPL-2.0+
12 * This provides a bit-banged interface to the ethernet MII management
116 BB_MII_RELOCATE(bb_miiphy_buses[i].init, gd->reloc_off); in bb_miiphy_init()
117 BB_MII_RELOCATE(bb_miiphy_buses[i].mdio_active, gd->reloc_off); in bb_miiphy_init()
118 BB_MII_RELOCATE(bb_miiphy_buses[i].mdio_tristate, gd->reloc_off); in bb_miiphy_init()
119 BB_MII_RELOCATE(bb_miiphy_buses[i].set_mdio, gd->reloc_off); in bb_miiphy_init()
120 BB_MII_RELOCATE(bb_miiphy_buses[i].get_mdio, gd->reloc_off); in bb_miiphy_init()
121 BB_MII_RELOCATE(bb_miiphy_buses[i].set_mdc, gd->reloc_off); in bb_miiphy_init()
122 BB_MII_RELOCATE(bb_miiphy_buses[i].delay, gd->reloc_off); in bb_miiphy_init()
159 * Send a 32 bit preamble ('1's) with an extra '1' bit for good measure. in miiphy_pre()
166 bus->mdio_active(bus); in miiphy_pre()
167 bus->set_mdio(bus, 1); in miiphy_pre()
169 bus->set_mdc(bus, 0); in miiphy_pre()
170 bus->delay(bus); in miiphy_pre()
171 bus->set_mdc(bus, 1); in miiphy_pre()
172 bus->delay(bus); in miiphy_pre()
175 /* send the start bit (01) and the read opcode (10) or write (10) */ in miiphy_pre()
176 bus->set_mdc(bus, 0); in miiphy_pre()
177 bus->set_mdio(bus, 0); in miiphy_pre()
178 bus->delay(bus); in miiphy_pre()
179 bus->set_mdc(bus, 1); in miiphy_pre()
180 bus->delay(bus); in miiphy_pre()
181 bus->set_mdc(bus, 0); in miiphy_pre()
182 bus->set_mdio(bus, 1); in miiphy_pre()
183 bus->delay(bus); in miiphy_pre()
184 bus->set_mdc(bus, 1); in miiphy_pre()
185 bus->delay(bus); in miiphy_pre()
186 bus->set_mdc(bus, 0); in miiphy_pre()
187 bus->set_mdio(bus, read); in miiphy_pre()
188 bus->delay(bus); in miiphy_pre()
189 bus->set_mdc(bus, 1); in miiphy_pre()
190 bus->delay(bus); in miiphy_pre()
191 bus->set_mdc(bus, 0); in miiphy_pre()
192 bus->set_mdio(bus, !read); in miiphy_pre()
193 bus->delay(bus); in miiphy_pre()
194 bus->set_mdc(bus, 1); in miiphy_pre()
195 bus->delay(bus); in miiphy_pre()
199 bus->set_mdc(bus, 0); in miiphy_pre()
201 bus->set_mdio(bus, 0); in miiphy_pre()
203 bus->set_mdio(bus, 1); in miiphy_pre()
205 bus->delay(bus); in miiphy_pre()
206 bus->set_mdc(bus, 1); in miiphy_pre()
207 bus->delay(bus); in miiphy_pre()
213 bus->set_mdc(bus, 0); in miiphy_pre()
215 bus->set_mdio(bus, 0); in miiphy_pre()
217 bus->set_mdio(bus, 1); in miiphy_pre()
219 bus->delay(bus); in miiphy_pre()
220 bus->set_mdc(bus, 1); in miiphy_pre()
221 bus->delay(bus); in miiphy_pre()
240 bus = bb_miiphy_getbus(miidev->name); in bb_miiphy_read()
242 return -1; in bb_miiphy_read()
247 /* tri-state our MDIO I/O pin so we can read */ in bb_miiphy_read()
248 bus->set_mdc(bus, 0); in bb_miiphy_read()
249 bus->mdio_tristate(bus); in bb_miiphy_read()
250 bus->delay(bus); in bb_miiphy_read()
251 bus->set_mdc(bus, 1); in bb_miiphy_read()
252 bus->delay(bus); in bb_miiphy_read()
254 /* check the turnaround bit: the PHY should be driving it to zero */ in bb_miiphy_read()
255 bus->get_mdio(bus, &v); in bb_miiphy_read()
259 bus->set_mdc(bus, 0); in bb_miiphy_read()
260 bus->delay(bus); in bb_miiphy_read()
261 bus->set_mdc(bus, 1); in bb_miiphy_read()
262 bus->delay(bus); in bb_miiphy_read()
265 return -1; in bb_miiphy_read()
268 bus->set_mdc(bus, 0); in bb_miiphy_read()
269 bus->delay(bus); in bb_miiphy_read()
274 bus->set_mdc(bus, 1); in bb_miiphy_read()
275 bus->delay(bus); in bb_miiphy_read()
277 bus->get_mdio(bus, &v); in bb_miiphy_read()
279 bus->set_mdc(bus, 0); in bb_miiphy_read()
280 bus->delay(bus); in bb_miiphy_read()
283 bus->set_mdc(bus, 1); in bb_miiphy_read()
284 bus->delay(bus); in bb_miiphy_read()
285 bus->set_mdc(bus, 0); in bb_miiphy_read()
286 bus->delay(bus); in bb_miiphy_read()
287 bus->set_mdc(bus, 1); in bb_miiphy_read()
288 bus->delay(bus); in bb_miiphy_read()
311 bus = bb_miiphy_getbus(miidev->name); in bb_miiphy_write()
314 return -1; in bb_miiphy_write()
320 bus->set_mdc(bus, 0); in bb_miiphy_write()
321 bus->set_mdio(bus, 1); in bb_miiphy_write()
322 bus->delay(bus); in bb_miiphy_write()
323 bus->set_mdc(bus, 1); in bb_miiphy_write()
324 bus->delay(bus); in bb_miiphy_write()
325 bus->set_mdc(bus, 0); in bb_miiphy_write()
326 bus->set_mdio(bus, 0); in bb_miiphy_write()
327 bus->delay(bus); in bb_miiphy_write()
328 bus->set_mdc(bus, 1); in bb_miiphy_write()
329 bus->delay(bus); in bb_miiphy_write()
333 bus->set_mdc(bus, 0); in bb_miiphy_write()
335 bus->set_mdio(bus, 0); in bb_miiphy_write()
337 bus->set_mdio(bus, 1); in bb_miiphy_write()
339 bus->delay(bus); in bb_miiphy_write()
340 bus->set_mdc(bus, 1); in bb_miiphy_write()
341 bus->delay(bus); in bb_miiphy_write()
346 * Tri-state the MDIO line. in bb_miiphy_write()
348 bus->mdio_tristate(bus); in bb_miiphy_write()
349 bus->set_mdc(bus, 0); in bb_miiphy_write()
350 bus->delay(bus); in bb_miiphy_write()
351 bus->set_mdc(bus, 1); in bb_miiphy_write()
352 bus->delay(bus); in bb_miiphy_write()