Lines Matching +full:0 +full:x0000c000
29 #define PCH_GBE_INT_RX_DMA_CMPLT 0x00000001
30 #define PCH_GBE_INT_RX_VALID 0x00000002
31 #define PCH_GBE_INT_RX_FRAME_ERR 0x00000004
32 #define PCH_GBE_INT_RX_FIFO_ERR 0x00000008
33 #define PCH_GBE_INT_RX_DMA_ERR 0x00000010
34 #define PCH_GBE_INT_RX_DSC_EMP 0x00000020
35 #define PCH_GBE_INT_TX_CMPLT 0x00000100
36 #define PCH_GBE_INT_TX_DMA_CMPLT 0x00000200
37 #define PCH_GBE_INT_TX_FIFO_ERR 0x00000400
38 #define PCH_GBE_INT_TX_DMA_ERR 0x00000800
39 #define PCH_GBE_INT_PAUSE_CMPLT 0x00001000
40 #define PCH_GBE_INT_MIIM_CMPLT 0x00010000
41 #define PCH_GBE_INT_PHY_INT 0x00100000
42 #define PCH_GBE_INT_WOL_DET 0x01000000
43 #define PCH_GBE_INT_TCPIP_ERR 0x10000000
46 #define PCH_GBE_MODE_MII_ETHER 0x00000000
47 #define PCH_GBE_MODE_GMII_ETHER 0x80000000
48 #define PCH_GBE_MODE_HALF_DUPLEX 0x00000000
49 #define PCH_GBE_MODE_FULL_DUPLEX 0x40000000
50 #define PCH_GBE_MODE_FR_BST 0x04000000
53 #define PCH_GBE_ALL_RST 0x80000000
54 #define PCH_GBE_TX_RST 0x00008000
55 #define PCH_GBE_RX_RST 0x00004000
58 #define PCH_GBE_EX_LIST_EN 0x00000008
59 #define PCH_GBE_RX_TCPIPACC_OFF 0x00000004
60 #define PCH_GBE_TX_TCPIPACC_EN 0x00000002
61 #define PCH_GBE_RX_TCPIPACC_EN 0x00000001
64 #define PCH_GBE_MRE_MAC_RX_EN 0x00000001
67 #define PCH_GBE_FL_CTRL_EN 0x80000000
70 #define PCH_GBE_ADD_FIL_EN 0x80000000
71 #define PCH_GBE_MLT_FIL_EN 0x40000000
72 #define PCH_GBE_RH_ALM_EMP_4 0x00000000
73 #define PCH_GBE_RH_ALM_EMP_8 0x00004000
74 #define PCH_GBE_RH_ALM_EMP_16 0x00008000
75 #define PCH_GBE_RH_ALM_EMP_32 0x0000c000
76 #define PCH_GBE_RH_ALM_FULL_4 0x00000000
77 #define PCH_GBE_RH_ALM_FULL_8 0x00001000
78 #define PCH_GBE_RH_ALM_FULL_16 0x00002000
79 #define PCH_GBE_RH_ALM_FULL_32 0x00003000
80 #define PCH_GBE_RH_RD_TRG_4 0x00000000
81 #define PCH_GBE_RH_RD_TRG_8 0x00000200
82 #define PCH_GBE_RH_RD_TRG_16 0x00000400
83 #define PCH_GBE_RH_RD_TRG_32 0x00000600
84 #define PCH_GBE_RH_RD_TRG_64 0x00000800
85 #define PCH_GBE_RH_RD_TRG_128 0x00000a00
86 #define PCH_GBE_RH_RD_TRG_256 0x00000c00
87 #define PCH_GBE_RH_RD_TRG_512 0x00000e00
90 #define PCH_GBE_TM_NO_RTRY 0x80000000
91 #define PCH_GBE_TM_LONG_PKT 0x40000000
92 #define PCH_GBE_TM_ST_AND_FD 0x20000000
93 #define PCH_GBE_TM_SHORT_PKT 0x10000000
94 #define PCH_GBE_TM_LTCOL_RETX 0x08000000
95 #define PCH_GBE_TM_TH_TX_STRT_4 0x00000000
96 #define PCH_GBE_TM_TH_TX_STRT_8 0x00004000
97 #define PCH_GBE_TM_TH_TX_STRT_16 0x00008000
98 #define PCH_GBE_TM_TH_TX_STRT_32 0x0000c000
99 #define PCH_GBE_TM_TH_ALM_EMP_4 0x00000000
100 #define PCH_GBE_TM_TH_ALM_EMP_8 0x00000800
101 #define PCH_GBE_TM_TH_ALM_EMP_16 0x00001000
102 #define PCH_GBE_TM_TH_ALM_EMP_32 0x00001800
103 #define PCH_GBE_TM_TH_ALM_EMP_64 0x00002000
104 #define PCH_GBE_TM_TH_ALM_EMP_128 0x00002800
105 #define PCH_GBE_TM_TH_ALM_EMP_256 0x00003000
106 #define PCH_GBE_TM_TH_ALM_EMP_512 0x00003800
107 #define PCH_GBE_TM_TH_ALM_FULL_4 0x00000000
108 #define PCH_GBE_TM_TH_ALM_FULL_8 0x00000200
109 #define PCH_GBE_TM_TH_ALM_FULL_16 0x00000400
110 #define PCH_GBE_TM_TH_ALM_FULL_32 0x00000600
113 #define PCH_GBE_BUSY 0x80000000
116 #define PCH_GBE_MIIM_OPER_WRITE 0x04000000
117 #define PCH_GBE_MIIM_OPER_READ 0x00000000
118 #define PCH_GBE_MIIM_OPER_READY 0x04000000
123 #define PCH_GBE_CRS_SEL 0x00000010
124 #define PCH_GBE_RGMII_RATE_125M 0x00000000
125 #define PCH_GBE_RGMII_RATE_25M 0x00000008
126 #define PCH_GBE_RGMII_RATE_2_5M 0x0000000c
127 #define PCH_GBE_RGMII_MODE_GMII 0x00000000
128 #define PCH_GBE_RGMII_MODE_RGMII 0x00000002
129 #define PCH_GBE_CHIP_TYPE_EXTERNAL 0x00000000
130 #define PCH_GBE_CHIP_TYPE_INTERNAL 0x00000001
133 #define PCH_GBE_RX_DMA_EN 0x00000002
134 #define PCH_GBE_TX_DMA_EN 0x00000001
137 #define PCH_GBE_RXD_ACC_STAT_BCAST 0x00000400
138 #define PCH_GBE_RXD_ACC_STAT_MCAST 0x00000200
139 #define PCH_GBE_RXD_ACC_STAT_UCAST 0x00000100
140 #define PCH_GBE_RXD_ACC_STAT_TCPIPOK 0x000000c0
141 #define PCH_GBE_RXD_ACC_STAT_IPOK 0x00000080
142 #define PCH_GBE_RXD_ACC_STAT_TCPOK 0x00000040
143 #define PCH_GBE_RXD_ACC_STAT_IP6ERR 0x00000020
144 #define PCH_GBE_RXD_ACC_STAT_OFLIST 0x00000010
145 #define PCH_GBE_RXD_ACC_STAT_TYPEIP 0x00000008
146 #define PCH_GBE_RXD_ACC_STAT_MACL 0x00000004
147 #define PCH_GBE_RXD_ACC_STAT_PPPOE 0x00000002
148 #define PCH_GBE_RXD_ACC_STAT_VTAGT 0x00000001
149 #define PCH_GBE_RXD_GMAC_STAT_PAUSE 0x0200
150 #define PCH_GBE_RXD_GMAC_STAT_MARBR 0x0100
151 #define PCH_GBE_RXD_GMAC_STAT_MARMLT 0x0080
152 #define PCH_GBE_RXD_GMAC_STAT_MARIND 0x0040
153 #define PCH_GBE_RXD_GMAC_STAT_MARNOTMT 0x0020
154 #define PCH_GBE_RXD_GMAC_STAT_TLONG 0x0010
155 #define PCH_GBE_RXD_GMAC_STAT_TSHRT 0x0008
156 #define PCH_GBE_RXD_GMAC_STAT_NOTOCTAL 0x0004
157 #define PCH_GBE_RXD_GMAC_STAT_NBLERR 0x0002
158 #define PCH_GBE_RXD_GMAC_STAT_CRCERR 0x0001
161 #define PCH_GBE_TXD_CTRL_TCPIP_ACC_OFF 0x0008
162 #define PCH_GBE_TXD_CTRL_ITAG 0x0004
163 #define PCH_GBE_TXD_CTRL_ICRC 0x0002
164 #define PCH_GBE_TXD_CTRL_APAD 0x0001
166 #define PCH_GBE_TXD_GMAC_STAT_CMPLT 0x2000
167 #define PCH_GBE_TXD_GMAC_STAT_ABT 0x1000
168 #define PCH_GBE_TXD_GMAC_STAT_EXCOL 0x0800
169 #define PCH_GBE_TXD_GMAC_STAT_SNGCOL 0x0400
170 #define PCH_GBE_TXD_GMAC_STAT_MLTCOL 0x0200
171 #define PCH_GBE_TXD_GMAC_STAT_CRSER 0x0100
172 #define PCH_GBE_TXD_GMAC_STAT_TLNG 0x0080
173 #define PCH_GBE_TXD_GMAC_STAT_TSHRT 0x0040
174 #define PCH_GBE_TXD_GMAC_STAT_LTCOL 0x0020
175 #define PCH_GBE_TXD_GMAC_STAT_TFUNDFLW 0x0010