Lines Matching refs:rk_clrsetreg
209 rk_clrsetreg(&grf->mac_con1, PX30_GMAC_SPEED_MASK, speed); in px30_gmac_fix_mac_speed()
292 rk_clrsetreg(&grf->mac_con[1], in rk3228_gmac_fix_mac_speed()
324 rk_clrsetreg(&grf->soc_con1, RK3288_GMAC_CLK_SEL_MASK, clk); in rk3288_gmac_fix_mac_speed()
367 rk_clrsetreg(&grf->mac_con0, RK3308_GMAC_SPEED_MASK, speed); in rk3308_gmac_fix_mac_speed()
414 rk_clrsetreg(pdata->integrated_phy ? &grf->mac_con[2] : &grf->mac_con[1], in rk3328_gmac_fix_mac_speed()
452 rk_clrsetreg(&grf->soc_con15, RK3368_GMAC_CLK_SEL_MASK, clk); in rk3368_gmac_fix_mac_speed()
480 rk_clrsetreg(&grf->soc_con5, RK3399_GMAC_CLK_SEL_MASK, clk); in rk3399_gmac_fix_mac_speed()
515 rk_clrsetreg(&grf->gmac_con0, in rv1108_set_rmii_speed()
575 rk_clrsetreg(&grf->gmac1_con0, RK3528_GMAC1_CLK_RGMII_DIV_MASK, div); in rk3528_set_rgmii_speed()
577 rk_clrsetreg(&grf->gmac0_con, RK3528_GMAC0_CLK_RMII_DIV_MASK, div); in rk3528_set_rgmii_speed()
620 rk_clrsetreg(&grf->soc_con[0], in rk3562_set_gmac_speed()
634 rk_clrsetreg(&grf->soc_con[0], in rk3562_set_gmac_speed()
656 rk_clrsetreg(&grf->soc_con[1], RK3562_GMAC1_CLK_RMII_DIV_MASK, div); in rk3562_set_gmac_speed()
658 rk_clrsetreg(&grf->soc_con[0], RK3562_GMAC0_CLK_RGMII_DIV_MASK, div); in rk3562_set_gmac_speed()
716 rk_clrsetreg(&php_grf->clk_con1, div_mask, div); in rk3588_set_rgmii_speed()
749 rk_clrsetreg(&grf->gmac_clk_con, RV1106_GMAC_CLK_RMII_DIV_MASK, div); in rv1106_set_rmii_speed()
806 rk_clrsetreg(&grf->mac_con1, in px30_gmac_set_to_rmii()
836 rk_clrsetreg(&grf->mac_con1, in rk1808_gmac_set_to_rgmii()
844 rk_clrsetreg(&grf->mac_con0, in rk1808_gmac_set_to_rgmii()
879 rk_clrsetreg(&grf->mac_con[1], in rk3228_gmac_set_to_rgmii()
888 rk_clrsetreg(&grf->mac_con[0], in rk3228_gmac_set_to_rgmii()
908 rk_clrsetreg(&grf->mac_con[1], in rk3228_gmac_set_to_rmii()
922 rk_clrsetreg(&grf->soc_con1, in rk3288_gmac_set_to_rgmii()
926 rk_clrsetreg(&grf->soc_con3, in rk3288_gmac_set_to_rgmii()
948 rk_clrsetreg(&grf->mac_con0, in rk3308_gmac_set_to_rmii()
981 rk_clrsetreg(&grf->mac_con[1], in rk3328_gmac_set_to_rgmii()
990 rk_clrsetreg(&grf->mac_con[0], in rk3328_gmac_set_to_rgmii()
1009 rk_clrsetreg(pdata->integrated_phy ? &grf->mac_con[2] : &grf->mac_con[1], in rk3328_gmac_set_to_rmii()
1039 rk_clrsetreg(&grf->soc_con15, in rk3368_gmac_set_to_rgmii()
1043 rk_clrsetreg(&grf->soc_con16, in rk3368_gmac_set_to_rgmii()
1060 rk_clrsetreg(&grf->soc_con5, in rk3399_gmac_set_to_rgmii()
1064 rk_clrsetreg(&grf->soc_con6, in rk3399_gmac_set_to_rgmii()
1085 rk_clrsetreg(&grf->gmac_con0, in rv1108_gmac_set_to_rmii()
1118 rk_clrsetreg(&grf->con_iomux, in rk3228_gmac_integrated_phy_powerup()
1122 rk_clrsetreg(&grf->macphy_con[2], in rk3228_gmac_integrated_phy_powerup()
1126 rk_clrsetreg(&grf->macphy_con[3], in rk3228_gmac_integrated_phy_powerup()
1131 rk_clrsetreg(&grf->macphy_con[0], in rk3228_gmac_integrated_phy_powerup()
1144 rk_clrsetreg(&grf->macphy_con[0], in rk3228_gmac_integrated_phy_powerup()
1178 rk_clrsetreg(&grf->macphy_con[1], in rk3328_gmac_integrated_phy_powerup()
1182 rk_clrsetreg(&grf->macphy_con[2], in rk3328_gmac_integrated_phy_powerup()
1186 rk_clrsetreg(&grf->macphy_con[3], in rk3328_gmac_integrated_phy_powerup()
1191 rk_clrsetreg(&grf->macphy_con[0], in rk3328_gmac_integrated_phy_powerup()
1204 rk_clrsetreg(&grf->macphy_con[0], in rk3328_gmac_integrated_phy_powerup()
1267 rk_clrsetreg(&grf->macphy_con0, in rk3528_gmac_integrated_phy_powerup()
1277 rk_clrsetreg(&grf->macphy_con1, in rk3528_gmac_integrated_phy_powerup()
1306 rk_clrsetreg(&grf->gmac1_con1, RK3528_GMAC1_CLK_RMII_MODE_MASK, clk_mode); in rk3528_set_to_rmii()
1309 rk_clrsetreg(&grf->gmac0_con, RK3528_GMAC0_CLK_RMII_MODE_MASK, clk_mode); in rk3528_set_to_rmii()
1354 rk_clrsetreg(&grf->gmac1_con0, in rk3528_set_to_rgmii()
1361 rk_clrsetreg(&grf->gmac1_con1, in rk3528_set_to_rgmii()
1383 rk_clrsetreg(&grf->soc_con[0], RK3562_GMAC0_RMII_MODE_MASK, mode); in rk3562_set_to_rmii()
1422 rk_clrsetreg(&grf->soc_con[0], RK3562_GMAC0_RGMII_MODE_MASK, in rk3562_set_to_rgmii()
1433 rk_clrsetreg(&ioc->mac0_io_con1, in rk3562_set_to_rgmii()
1438 rk_clrsetreg(&ioc->mac0_io_con0, in rk3562_set_to_rgmii()
1444 rk_clrsetreg(&ioc->mac1_io_con1, in rk3562_set_to_rgmii()
1449 rk_clrsetreg(&ioc->mac1_io_con0, in rk3562_set_to_rgmii()
1474 rk_clrsetreg(con1, in rk3568_set_to_rmii()
1516 rk_clrsetreg(con0, in rk3568_set_to_rgmii()
1522 rk_clrsetreg(con1, in rk3568_set_to_rgmii()
1563 rk_clrsetreg(&php_grf->gmac_con0, intf_sel_mask, intf_sel); in rk3588_set_to_rmii()
1564 rk_clrsetreg(&php_grf->clk_con1, clk_mode_mask, clk_mode); in rk3588_set_to_rmii()
1637 rk_clrsetreg(offset_con, in rk3588_set_to_rgmii()
1643 rk_clrsetreg(&grf->soc_con7, tx_enable_mask | rx_enable_mask, in rk3588_set_to_rgmii()
1646 rk_clrsetreg(&php_grf->gmac_con0, intf_sel_mask, intf_sel); in rk3588_set_to_rgmii()
1647 rk_clrsetreg(&php_grf->clk_con1, clk_mode_mask, clk_mode); in rk3588_set_to_rgmii()
1712 rk_clrsetreg(&grf->macphy_con0, in rv1106_gmac_integrated_phy_powerup()
1722 rk_clrsetreg(&grf->macphy_con1, in rv1106_gmac_integrated_phy_powerup()
1739 rk_clrsetreg(&grf->gmac_clk_con, in rv1106_set_to_rmii()
1756 rk_clrsetreg(&grf->mac_con0, in rv1126_set_to_rmii()
1803 rk_clrsetreg(&grf->mac_con0, in rv1126_set_to_rgmii()
1815 rk_clrsetreg(&grf->mac_con1, in rv1126_set_to_rgmii()
1821 rk_clrsetreg(&grf->mac_con2, in rv1126_set_to_rgmii()
1848 rk_clrsetreg(&grf->gmac1_con0, RK3528_GMAC1_CLK_SELET_MASK, val); in rk3528_set_clock_selection()
1891 rk_clrsetreg(&grf->soc_con[0], RK3562_GMAC0_CLK_SELET_MASK, val); in rk3562_set_clock_selection()
1894 rk_clrsetreg(&ioc->mac1_io_con1, in rk3562_set_clock_selection()
1896 rk_clrsetreg(&ioc->mac0_io_con1, in rk3562_set_clock_selection()
1902 rk_clrsetreg(&grf->soc_con[1], RK3562_GMAC1_CLK_SELET_MASK, val); in rk3562_set_clock_selection()
1905 rk_clrsetreg(&ioc->mac1_io_con1, in rk3562_set_clock_selection()
1932 rk_clrsetreg(&php_grf->clk_con1, mask, val); in rk3588_set_clock_selection()