Lines Matching +full:suppress +full:- +full:preamble
8 * Cory T. Tusar, Videon Central, Inc., <ctusar@videon-central.com>
17 * SPDX-License-Identifier: GPL-2.0+
29 #define GET_PRIV(eth_dev) ((struct ep93xx_priv *)(eth_dev)->priv)
30 #define GET_REGS(eth_dev) (GET_PRIV(eth_dev)->regs)
48 printf(" rx_dq.base %p\n", priv->rx_dq.base); in dump_dev()
49 printf(" rx_dq.current %p\n", priv->rx_dq.current); in dump_dev()
50 printf(" rx_dq.end %p\n", priv->rx_dq.end); in dump_dev()
51 printf(" rx_sq.base %p\n", priv->rx_sq.base); in dump_dev()
52 printf(" rx_sq.current %p\n", priv->rx_sq.current); in dump_dev()
53 printf(" rx_sq.end %p\n", priv->rx_sq.end); in dump_dev()
58 printf(" tx_dq.base %p\n", priv->tx_dq.base); in dump_dev()
59 printf(" tx_dq.current %p\n", priv->tx_dq.current); in dump_dev()
60 printf(" tx_dq.end %p\n", priv->tx_dq.end); in dump_dev()
61 printf(" tx_sq.base %p\n", priv->tx_sq.base); in dump_dev()
62 printf(" tx_sq.current %p\n", priv->tx_sq.current); in dump_dev()
63 printf(" tx_sq.end %p\n", priv->tx_sq.end); in dump_dev()
78 priv->rx_sq.base + i, in dump_rx_status_queue()
79 (priv->rx_sq.base + i)->word1, in dump_rx_status_queue()
80 (priv->rx_sq.base + i)->word2); in dump_rx_status_queue()
96 priv->rx_dq.base + i, in dump_rx_descriptor_queue()
97 (priv->rx_dq.base + i)->word1, in dump_rx_descriptor_queue()
98 (priv->rx_dq.base + i)->word2); in dump_rx_descriptor_queue()
114 priv->tx_dq.base + i, in dump_tx_descriptor_queue()
115 (priv->tx_dq.base + i)->word1, in dump_tx_descriptor_queue()
116 (priv->tx_dq.base + i)->word2); in dump_tx_descriptor_queue()
132 priv->rx_sq.base + i, in dump_tx_status_queue()
133 (priv->rx_sq.base + i)->word1); in dump_tx_status_queue()
155 value = readl(&mac->selfctl); in ep93xx_mac_reset()
157 writel(value, &mac->selfctl); in ep93xx_mac_reset()
159 while (readl(&mac->selfctl) & SELFCTL_RESET) in ep93xx_mac_reset()
162 debug("-ep93xx_mac_reset"); in ep93xx_mac_reset()
170 uchar *mac_addr = dev->enetaddr; in ep93xx_eth_open()
179 priv->tx_dq.current = priv->tx_dq.base; in ep93xx_eth_open()
180 priv->tx_dq.end = (priv->tx_dq.base + NUMTXDESC); in ep93xx_eth_open()
182 priv->tx_sq.current = priv->tx_sq.base; in ep93xx_eth_open()
183 priv->tx_sq.end = (priv->tx_sq.base + NUMTXDESC); in ep93xx_eth_open()
185 priv->rx_dq.current = priv->rx_dq.base; in ep93xx_eth_open()
186 priv->rx_dq.end = (priv->rx_dq.base + NUMRXDESC); in ep93xx_eth_open()
188 priv->rx_sq.current = priv->rx_sq.base; in ep93xx_eth_open()
189 priv->rx_sq.end = (priv->rx_sq.base + NUMRXDESC); in ep93xx_eth_open()
196 writel((uint32_t)priv->tx_dq.base, &mac->txdq.badd); in ep93xx_eth_open()
197 writel((uint32_t)priv->tx_dq.base, &mac->txdq.curadd); in ep93xx_eth_open()
198 writel(sizeof(struct tx_descriptor) * NUMTXDESC, &mac->txdq.blen); in ep93xx_eth_open()
200 writel((uint32_t)priv->tx_sq.base, &mac->txstsq.badd); in ep93xx_eth_open()
201 writel((uint32_t)priv->tx_sq.base, &mac->txstsq.curadd); in ep93xx_eth_open()
202 writel(sizeof(struct tx_status) * NUMTXDESC, &mac->txstsq.blen); in ep93xx_eth_open()
204 writel(0x00040000, &mac->txdthrshld); in ep93xx_eth_open()
205 writel(0x00040000, &mac->txststhrshld); in ep93xx_eth_open()
207 writel((TXSTARTMAX << 0) | (PKTSIZE_ALIGN << 16), &mac->maxfrmlen); in ep93xx_eth_open()
208 writel(BMCTL_TXEN, &mac->bmctl); in ep93xx_eth_open()
215 writel((uint32_t)priv->rx_dq.base, &mac->rxdq.badd); in ep93xx_eth_open()
216 writel((uint32_t)priv->rx_dq.base, &mac->rxdq.curadd); in ep93xx_eth_open()
217 writel(sizeof(struct rx_descriptor) * NUMRXDESC, &mac->rxdq.blen); in ep93xx_eth_open()
219 writel((uint32_t)priv->rx_sq.base, &mac->rxstsq.badd); in ep93xx_eth_open()
220 writel((uint32_t)priv->rx_sq.base, &mac->rxstsq.curadd); in ep93xx_eth_open()
221 writel(sizeof(struct rx_status) * NUMRXDESC, &mac->rxstsq.blen); in ep93xx_eth_open()
223 writel(0x00040000, &mac->rxdthrshld); in ep93xx_eth_open()
225 writel(BMCTL_RXEN, &mac->bmctl); in ep93xx_eth_open()
227 writel(0x00040000, &mac->rxststhrshld); in ep93xx_eth_open()
230 while (!(readl(&mac->bmsts) & BMSTS_RXACT)) in ep93xx_eth_open()
240 (priv->rx_dq.base + i)->word1 = (uint32_t)net_rx_packets[i]; in ep93xx_eth_open()
243 (priv->rx_dq.base + i)->word2 = PKTSIZE_ALIGN; in ep93xx_eth_open()
246 memset(priv->tx_dq.base, 0, in ep93xx_eth_open()
248 memset(priv->rx_sq.base, 0, in ep93xx_eth_open()
250 memset(priv->tx_sq.base, 0, in ep93xx_eth_open()
253 writel(NUMRXDESC, &mac->rxdqenq); in ep93xx_eth_open()
254 writel(NUMRXDESC, &mac->rxstsqenq); in ep93xx_eth_open()
257 writel(AFP_IAPRIMARY, &mac->afp); in ep93xx_eth_open()
260 &mac->indad); in ep93xx_eth_open()
261 writel(mac_addr[4] | (mac_addr[5] << 8), &mac->indad_upper); in ep93xx_eth_open()
265 RXCTL_RCRCA | RXCTL_MA, &mac->rxctl); in ep93xx_eth_open()
266 writel(TXCTL_STXON, &mac->txctl); in ep93xx_eth_open()
275 debug("-ep93xx_eth_open"); in ep93xx_eth_open()
290 writel(0x00000000, &mac->rxctl); in ep93xx_eth_close()
291 writel(0x00000000, &mac->txctl); in ep93xx_eth_close()
293 debug("-ep93xx_eth_close"); in ep93xx_eth_close()
304 int len = -1; in ep93xx_eth_rcv_packet()
308 if (RX_STATUS_RFP(priv->rx_sq.current)) { in ep93xx_eth_rcv_packet()
309 if (RX_STATUS_RWE(priv->rx_sq.current)) { in ep93xx_eth_rcv_packet()
319 len = RX_STATUS_FRAME_LEN(priv->rx_sq.current); in ep93xx_eth_rcv_packet()
322 (uchar *)priv->rx_dq.current->word1, len); in ep93xx_eth_rcv_packet()
328 priv->rx_sq.current->word1, in ep93xx_eth_rcv_packet()
329 priv->rx_sq.current->word2); in ep93xx_eth_rcv_packet()
340 memset((void *)priv->rx_sq.current, 0, in ep93xx_eth_rcv_packet()
343 priv->rx_sq.current++; in ep93xx_eth_rcv_packet()
344 if (priv->rx_sq.current >= priv->rx_sq.end) in ep93xx_eth_rcv_packet()
345 priv->rx_sq.current = priv->rx_sq.base; in ep93xx_eth_rcv_packet()
347 priv->rx_dq.current++; in ep93xx_eth_rcv_packet()
348 if (priv->rx_dq.current >= priv->rx_dq.end) in ep93xx_eth_rcv_packet()
349 priv->rx_dq.current = priv->rx_dq.base; in ep93xx_eth_rcv_packet()
356 writel(1, &mac->rxdqenq); in ep93xx_eth_rcv_packet()
357 writel(1, &mac->rxstsqenq); in ep93xx_eth_rcv_packet()
362 debug("-ep93xx_eth_rcv_packet %d", len); in ep93xx_eth_rcv_packet()
374 int ret = -1; in ep93xx_eth_send_packet()
388 priv->tx_dq.current->word1 = (uint32_t)packet; in ep93xx_eth_send_packet()
391 priv->tx_dq.current->word2 = length | TX_DESC_EOF; in ep93xx_eth_send_packet()
394 priv->tx_sq.current->word1 = 0; in ep93xx_eth_send_packet()
397 writel(1, &mac->txdqenq); in ep93xx_eth_send_packet()
400 while (!TX_STATUS_TXFP(priv->tx_sq.current)) in ep93xx_eth_send_packet()
403 if (!TX_STATUS_TXWE(priv->tx_sq.current)) { in ep93xx_eth_send_packet()
405 priv->tx_sq.current->word1); in ep93xx_eth_send_packet()
417 debug("-ep93xx_eth_send_packet %d", ret); in ep93xx_eth_send_packet()
427 return -ENOMEM; in ep93xx_miiphy_initialize()
428 strncpy(mdiodev->name, "ep93xx_eth0", MDIO_NAME_LEN); in ep93xx_miiphy_initialize()
429 mdiodev->read = ep93xx_miiphy_read; in ep93xx_miiphy_initialize()
430 mdiodev->write = ep93xx_miiphy_write; in ep93xx_miiphy_initialize()
447 int ret = -1; in ep93xx_eth_initialize()
460 priv->regs = (struct mac_regs *)base_addr; in ep93xx_eth_initialize()
462 priv->tx_dq.base = calloc(NUMTXDESC, in ep93xx_eth_initialize()
464 if (priv->tx_dq.base == NULL) { in ep93xx_eth_initialize()
469 priv->tx_sq.base = calloc(NUMTXDESC, in ep93xx_eth_initialize()
471 if (priv->tx_sq.base == NULL) { in ep93xx_eth_initialize()
476 priv->rx_dq.base = calloc(NUMRXDESC, in ep93xx_eth_initialize()
478 if (priv->rx_dq.base == NULL) { in ep93xx_eth_initialize()
483 priv->rx_sq.base = calloc(NUMRXDESC, in ep93xx_eth_initialize()
485 if (priv->rx_sq.base == NULL) { in ep93xx_eth_initialize()
497 dev->iobase = base_addr; in ep93xx_eth_initialize()
498 dev->priv = priv; in ep93xx_eth_initialize()
499 dev->init = ep93xx_eth_open; in ep93xx_eth_initialize()
500 dev->halt = ep93xx_eth_close; in ep93xx_eth_initialize()
501 dev->send = ep93xx_eth_send_packet; in ep93xx_eth_initialize()
502 dev->recv = ep93xx_eth_rcv_packet; in ep93xx_eth_initialize()
504 sprintf(dev->name, "ep93xx_eth-%hu", dev_num); in ep93xx_eth_initialize()
513 free(priv->rx_sq.base); in ep93xx_eth_initialize()
517 free(priv->rx_dq.base); in ep93xx_eth_initialize()
521 free(priv->tx_sq.base); in ep93xx_eth_initialize()
525 free(priv->tx_dq.base); in ep93xx_eth_initialize()
536 debug("-ep93xx_eth_initialize %d", ret); in ep93xx_eth_initialize()
553 * Read a 16-bit value from an MII register.
560 int ret = -1; in ep93xx_miiphy_read()
566 BUG_ON(bus->name == NULL); in ep93xx_miiphy_read()
571 * Save the current SelfCTL register value. Set MAC to suppress in ep93xx_miiphy_read()
572 * preamble bits. Wait for any previous MII command to complete in ep93xx_miiphy_read()
575 self_ctl = readl(&mac->selfctl); in ep93xx_miiphy_read()
577 writel(self_ctl & ~(1 << 8), &mac->selfctl); in ep93xx_miiphy_read()
580 while (readl(&mac->miists) & MIISTS_BUSY) in ep93xx_miiphy_read()
588 &mac->miicmd); in ep93xx_miiphy_read()
589 while (readl(&mac->miists) & MIISTS_BUSY) in ep93xx_miiphy_read()
592 value = (unsigned short)readl(&mac->miidata); in ep93xx_miiphy_read()
595 writel(self_ctl, &mac->selfctl); in ep93xx_miiphy_read()
600 debug("-ep93xx_miiphy_read"); in ep93xx_miiphy_read()
607 * Write a 16-bit value to an MII register.
613 int ret = -1; in ep93xx_miiphy_write()
619 BUG_ON(bus->name == NULL); in ep93xx_miiphy_write()
624 * Save the current SelfCTL register value. Set MAC to suppress in ep93xx_miiphy_write()
625 * preamble bits. Wait for any previous MII command to complete in ep93xx_miiphy_write()
628 self_ctl = readl(&mac->selfctl); in ep93xx_miiphy_write()
630 writel(self_ctl & ~(1 << 8), &mac->selfctl); in ep93xx_miiphy_write()
633 while (readl(&mac->miists) & MIISTS_BUSY) in ep93xx_miiphy_write()
637 writel((uint32_t)value, &mac->miidata); in ep93xx_miiphy_write()
639 &mac->miicmd); in ep93xx_miiphy_write()
640 while (readl(&mac->miists) & MIISTS_BUSY) in ep93xx_miiphy_write()
644 writel(self_ctl, &mac->selfctl); in ep93xx_miiphy_write()
649 debug("-ep93xx_miiphy_write"); in ep93xx_miiphy_write()