Lines Matching +full:flow +full:- +full:ctrl
2 Intel Pro 1000 for ppcboot/das-u-boot
3 Drivers are port from Intel's Linux driver e1000-4.3.15
10 Copyright(c) 1999 - 2002 Intel Corporation. All rights reserved.
12 * SPDX-License-Identifier: GPL-2.0+
16 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
60 * Normally U-Boot does not support this anyway. To fix it in this driver,
159 * hw - Struct containing variables accessed by shared code
160 * eecd - EECD's current value
176 * hw - Struct containing variables accessed by shared code
177 * eecd - EECD's current value
193 * hw - Struct containing variables accessed by shared code
194 * data - data to send to the EEPROM
195 * count - number of bits to shift out
207 mask = 0x01 << (count - 1); in e1000_shift_out_ee_bits()
241 * hw - Struct containing variables accessed by shared code
281 * hw - Struct containing variables accessed by shared code
285 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_standby_eeprom()
290 if (eeprom->type == e1000_eeprom_microwire) { in e1000_standby_eeprom()
294 udelay(eeprom->delay_usec); in e1000_standby_eeprom()
300 udelay(eeprom->delay_usec); in e1000_standby_eeprom()
306 udelay(eeprom->delay_usec); in e1000_standby_eeprom()
312 udelay(eeprom->delay_usec); in e1000_standby_eeprom()
313 } else if (eeprom->type == e1000_eeprom_spi) { in e1000_standby_eeprom()
318 udelay(eeprom->delay_usec); in e1000_standby_eeprom()
322 udelay(eeprom->delay_usec); in e1000_standby_eeprom()
329 * hw - Struct containing variables accessed by shared code
337 if (hw->mac_type == e1000_ich8lan) in e1000_is_onboard_nvm_eeprom()
340 if (hw->mac_type == e1000_82573 || hw->mac_type == e1000_82574) { in e1000_is_onboard_nvm_eeprom()
356 * hw - Struct containing variables accessed by shared code
363 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_acquire_eeprom()
369 return -E1000_ERR_SWFW_SYNC; in e1000_acquire_eeprom()
372 if (hw->mac_type != e1000_82573 && hw->mac_type != e1000_82574) { in e1000_acquire_eeprom()
374 if (hw->mac_type > e1000_82544) { in e1000_acquire_eeprom()
388 return -E1000_ERR_EEPROM; in e1000_acquire_eeprom()
395 if (eeprom->type == e1000_eeprom_microwire) { in e1000_acquire_eeprom()
403 } else if (eeprom->type == e1000_eeprom_spi) { in e1000_acquire_eeprom()
418 * hw - Struct containing variables accessed by shared code
422 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_init_eeprom_params()
427 if (hw->mac_type == e1000_igb) in e1000_init_eeprom_params()
434 switch (hw->mac_type) { in e1000_init_eeprom_params()
439 eeprom->type = e1000_eeprom_microwire; in e1000_init_eeprom_params()
440 eeprom->word_size = 64; in e1000_init_eeprom_params()
441 eeprom->opcode_bits = 3; in e1000_init_eeprom_params()
442 eeprom->address_bits = 6; in e1000_init_eeprom_params()
443 eeprom->delay_usec = 50; in e1000_init_eeprom_params()
444 eeprom->use_eerd = false; in e1000_init_eeprom_params()
445 eeprom->use_eewr = false; in e1000_init_eeprom_params()
452 eeprom->type = e1000_eeprom_microwire; in e1000_init_eeprom_params()
453 eeprom->opcode_bits = 3; in e1000_init_eeprom_params()
454 eeprom->delay_usec = 50; in e1000_init_eeprom_params()
456 eeprom->word_size = 256; in e1000_init_eeprom_params()
457 eeprom->address_bits = 8; in e1000_init_eeprom_params()
459 eeprom->word_size = 64; in e1000_init_eeprom_params()
460 eeprom->address_bits = 6; in e1000_init_eeprom_params()
462 eeprom->use_eerd = false; in e1000_init_eeprom_params()
463 eeprom->use_eewr = false; in e1000_init_eeprom_params()
470 eeprom->type = e1000_eeprom_spi; in e1000_init_eeprom_params()
471 eeprom->opcode_bits = 8; in e1000_init_eeprom_params()
472 eeprom->delay_usec = 1; in e1000_init_eeprom_params()
474 eeprom->page_size = 32; in e1000_init_eeprom_params()
475 eeprom->address_bits = 16; in e1000_init_eeprom_params()
477 eeprom->page_size = 8; in e1000_init_eeprom_params()
478 eeprom->address_bits = 8; in e1000_init_eeprom_params()
481 eeprom->type = e1000_eeprom_microwire; in e1000_init_eeprom_params()
482 eeprom->opcode_bits = 3; in e1000_init_eeprom_params()
483 eeprom->delay_usec = 50; in e1000_init_eeprom_params()
485 eeprom->word_size = 256; in e1000_init_eeprom_params()
486 eeprom->address_bits = 8; in e1000_init_eeprom_params()
488 eeprom->word_size = 64; in e1000_init_eeprom_params()
489 eeprom->address_bits = 6; in e1000_init_eeprom_params()
492 eeprom->use_eerd = false; in e1000_init_eeprom_params()
493 eeprom->use_eewr = false; in e1000_init_eeprom_params()
497 eeprom->type = e1000_eeprom_spi; in e1000_init_eeprom_params()
498 eeprom->opcode_bits = 8; in e1000_init_eeprom_params()
499 eeprom->delay_usec = 1; in e1000_init_eeprom_params()
501 eeprom->page_size = 32; in e1000_init_eeprom_params()
502 eeprom->address_bits = 16; in e1000_init_eeprom_params()
504 eeprom->page_size = 8; in e1000_init_eeprom_params()
505 eeprom->address_bits = 8; in e1000_init_eeprom_params()
507 eeprom->use_eerd = false; in e1000_init_eeprom_params()
508 eeprom->use_eewr = false; in e1000_init_eeprom_params()
512 eeprom->type = e1000_eeprom_spi; in e1000_init_eeprom_params()
513 eeprom->opcode_bits = 8; in e1000_init_eeprom_params()
514 eeprom->delay_usec = 1; in e1000_init_eeprom_params()
516 eeprom->page_size = 32; in e1000_init_eeprom_params()
517 eeprom->address_bits = 16; in e1000_init_eeprom_params()
519 eeprom->page_size = 8; in e1000_init_eeprom_params()
520 eeprom->address_bits = 8; in e1000_init_eeprom_params()
523 eeprom->use_eerd = true; in e1000_init_eeprom_params()
524 eeprom->use_eewr = true; in e1000_init_eeprom_params()
526 eeprom->type = e1000_eeprom_flash; in e1000_init_eeprom_params()
527 eeprom->word_size = 2048; in e1000_init_eeprom_params()
536 eeprom->type = e1000_eeprom_spi; in e1000_init_eeprom_params()
537 eeprom->opcode_bits = 8; in e1000_init_eeprom_params()
538 eeprom->delay_usec = 1; in e1000_init_eeprom_params()
540 eeprom->page_size = 32; in e1000_init_eeprom_params()
541 eeprom->address_bits = 16; in e1000_init_eeprom_params()
543 eeprom->page_size = 8; in e1000_init_eeprom_params()
544 eeprom->address_bits = 8; in e1000_init_eeprom_params()
546 eeprom->use_eerd = true; in e1000_init_eeprom_params()
547 eeprom->use_eewr = false; in e1000_init_eeprom_params()
551 eeprom->type = e1000_eeprom_invm; in e1000_init_eeprom_params()
552 eeprom->opcode_bits = 8; in e1000_init_eeprom_params()
553 eeprom->delay_usec = 1; in e1000_init_eeprom_params()
554 eeprom->page_size = 32; in e1000_init_eeprom_params()
555 eeprom->address_bits = 16; in e1000_init_eeprom_params()
556 eeprom->use_eerd = true; in e1000_init_eeprom_params()
557 eeprom->use_eewr = false; in e1000_init_eeprom_params()
563 if (eeprom->type == e1000_eeprom_spi || in e1000_init_eeprom_params()
564 eeprom->type == e1000_eeprom_invm) { in e1000_init_eeprom_params()
569 if (hw->mac_type <= e1000_82547_rev_2) { in e1000_init_eeprom_params()
571 eeprom->word_size = 64; in e1000_init_eeprom_params()
590 eeprom->word_size = 1 << (eeprom_size + EEPROM_WORD_SIZE_SHIFT); in e1000_init_eeprom_params()
598 * hw - Struct containing variables accessed by shared code
609 if (hw->mac_type == e1000_igb) in e1000_poll_eerd_eewr_done()
614 if (hw->mac_type == e1000_igb) in e1000_poll_eerd_eewr_done()
633 * hw - Struct containing variables accessed by shared code
634 * offset - offset of word in the EEPROM to read
635 * data - word read from the EEPROM
636 * words - number of words to read
651 if (hw->mac_type == e1000_igb) in e1000_read_eeprom_eerd()
661 if (hw->mac_type == e1000_igb) { in e1000_read_eeprom_eerd()
682 if (hw->eeprom.type == e1000_eeprom_spi) { in e1000_release_eeprom()
688 udelay(hw->eeprom.delay_usec); in e1000_release_eeprom()
689 } else if (hw->eeprom.type == e1000_eeprom_microwire) { in e1000_release_eeprom()
692 /* CS on Microwire is active-high */ in e1000_release_eeprom()
701 udelay(hw->eeprom.delay_usec); in e1000_release_eeprom()
707 udelay(hw->eeprom.delay_usec); in e1000_release_eeprom()
711 if (hw->mac_type > e1000_82544) { in e1000_release_eeprom()
722 * hw - Struct containing variables accessed by shared code
740 hw->eeprom.opcode_bits); in e1000_spi_eeprom_ready()
751 /* ATMEL SPI write time could vary from 0-20mSec on 3.3V devices (and in e1000_spi_eeprom_ready()
752 * only 0-5mSec on 5V devices) in e1000_spi_eeprom_ready()
756 return -E1000_ERR_EEPROM; in e1000_spi_eeprom_ready()
765 * hw - Struct containing variables accessed by shared code
766 * offset - offset of word in the EEPROM to read
767 * data - word read from the EEPROM
773 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_read_eeprom()
779 if (eeprom->word_size == 0) in e1000_read_eeprom()
785 if ((offset >= eeprom->word_size) || in e1000_read_eeprom()
786 (words > eeprom->word_size - offset) || in e1000_read_eeprom()
789 "Words = %d, size = %d\n", offset, eeprom->word_size); in e1000_read_eeprom()
790 return -E1000_ERR_EEPROM; in e1000_read_eeprom()
793 /* EEPROM's that don't use EERD to read require us to bit-bang the SPI in e1000_read_eeprom()
798 hw->eeprom.use_eerd == false) { in e1000_read_eeprom()
800 /* Prepare the EEPROM for bit-bang reading */ in e1000_read_eeprom()
802 return -E1000_ERR_EEPROM; in e1000_read_eeprom()
806 if (eeprom->use_eerd == true) in e1000_read_eeprom()
809 /* Set up the SPI or Microwire EEPROM for bit-bang reading. We have in e1000_read_eeprom()
811 if (eeprom->type == e1000_eeprom_spi) { in e1000_read_eeprom()
817 return -E1000_ERR_EEPROM; in e1000_read_eeprom()
824 if ((eeprom->address_bits == 8) && (offset >= 128)) in e1000_read_eeprom()
828 e1000_shift_out_ee_bits(hw, read_opcode, eeprom->opcode_bits); in e1000_read_eeprom()
830 eeprom->address_bits); in e1000_read_eeprom()
834 * overhead of eeprom setup and tear-down. The address in e1000_read_eeprom()
842 } else if (eeprom->type == e1000_eeprom_microwire) { in e1000_read_eeprom()
847 eeprom->opcode_bits); in e1000_read_eeprom()
849 eeprom->address_bits); in e1000_read_eeprom()
852 * the overhead of eeprom setup and tear-down. */ in e1000_read_eeprom()
867 * hw - Struct containing variables accessed by shared code
883 return -E1000_ERR_EEPROM; in e1000_validate_eeprom_checksum()
889 return -E1000_ERR_EEPROM; in e1000_validate_eeprom_checksum()
896 checksum = ((uint16_t)EEPROM_SUM) - checksum; in e1000_validate_eeprom_checksum()
908 return -E1000_ERR_EEPROM; in e1000_validate_eeprom_checksum()
916 * 2. Restart auto-negotiation or force link.
918 * hw - Struct containing variables accessed by shared code
929 if ((hw->mac_type == e1000_82545_rev_3) && in e1000_set_phy_mode()
930 (hw->media_type == e1000_media_type_copper)) { in e1000_set_phy_mode()
947 hw->phy_reset_disable = false; in e1000_set_phy_mode()
961 * returns: - E1000_ERR_RESET if fail to obtain semaphore.
968 int32_t timeout = hw->eeprom.word_size + 1; in e1000_get_software_semaphore()
973 if (hw->mac_type != e1000_80003es2lan) in e1000_get_software_semaphore()
983 timeout--; in e1000_get_software_semaphore()
987 DEBUGOUT("Driver can't access device - SMBI bit is set.\n"); in e1000_get_software_semaphore()
988 return -E1000_ERR_RESET; in e1000_get_software_semaphore()
1000 * returns: - None.
1011 if (!hw->eeprom_semaphore_present) in e1000_put_hw_eeprom_semaphore()
1015 if (hw->mac_type == e1000_80003es2lan) { in e1000_put_hw_eeprom_semaphore()
1031 * returns: - E1000_ERR_EEPROM if fail to access EEPROM.
1044 if (!hw->eeprom_semaphore_present) in e1000_get_hw_eeprom_semaphore()
1047 if (hw->mac_type == e1000_80003es2lan) { in e1000_get_hw_eeprom_semaphore()
1050 return -E1000_ERR_EEPROM; in e1000_get_hw_eeprom_semaphore()
1054 timeout = hw->eeprom.word_size + 1; in e1000_get_hw_eeprom_semaphore()
1065 timeout--; in e1000_get_hw_eeprom_semaphore()
1071 DEBUGOUT("Driver can't access the Eeprom - " in e1000_get_hw_eeprom_semaphore()
1073 return -E1000_ERR_EEPROM; in e1000_get_hw_eeprom_semaphore()
1091 return -E1000_ERR_SWFW_SYNC; in e1000_swfw_sync_acquire()
1101 timeout--; in e1000_swfw_sync_acquire()
1106 return -E1000_ERR_SWFW_SYNC; in e1000_swfw_sync_acquire()
1133 switch (hw->mac_type) { in e1000_is_second_port()
1150 * nic - Struct containing variables accessed by shared code
1164 if (hw->mac_type == e1000_igb) { in e1000_read_mac_addr()
1175 return -E1000_ERR_EEPROM; in e1000_read_mac_addr()
1192 * hw - Struct containing variables accessed by shared code
1219 DEBUGOUT("Clearing RAR[1-15]\n"); in e1000_init_rx_addrs()
1229 * hw - Struct containing variables accessed by shared code
1243 * hw - Struct containing variables accessed by shared code
1250 switch (hw->device_id) { in e1000_set_mac_type()
1252 switch (hw->revision_id) { in e1000_set_mac_type()
1254 hw->mac_type = e1000_82542_rev2_0; in e1000_set_mac_type()
1257 hw->mac_type = e1000_82542_rev2_1; in e1000_set_mac_type()
1261 return -E1000_ERR_MAC_TYPE; in e1000_set_mac_type()
1266 hw->mac_type = e1000_82543; in e1000_set_mac_type()
1272 hw->mac_type = e1000_82544; in e1000_set_mac_type()
1279 hw->mac_type = e1000_82540; in e1000_set_mac_type()
1283 hw->mac_type = e1000_82545; in e1000_set_mac_type()
1288 hw->mac_type = e1000_82545_rev_3; in e1000_set_mac_type()
1293 hw->mac_type = e1000_82546; in e1000_set_mac_type()
1301 hw->mac_type = e1000_82546_rev_3; in e1000_set_mac_type()
1306 hw->mac_type = e1000_82541; in e1000_set_mac_type()
1312 hw->mac_type = e1000_82541_rev_2; in e1000_set_mac_type()
1316 hw->mac_type = e1000_82547; in e1000_set_mac_type()
1319 hw->mac_type = e1000_82547_rev_2; in e1000_set_mac_type()
1330 hw->mac_type = e1000_82571; in e1000_set_mac_type()
1336 hw->mac_type = e1000_82572; in e1000_set_mac_type()
1341 hw->mac_type = e1000_82573; in e1000_set_mac_type()
1344 hw->mac_type = e1000_82574; in e1000_set_mac_type()
1350 hw->mac_type = e1000_80003es2lan; in e1000_set_mac_type()
1359 hw->mac_type = e1000_ich8lan; in e1000_set_mac_type()
1369 hw->mac_type = e1000_igb; in e1000_set_mac_type()
1373 return -E1000_ERR_MAC_TYPE; in e1000_set_mac_type()
1381 * hw - Struct containing variables accessed by shared code
1386 uint32_t ctrl; in e1000_reset_hw() local
1395 if (hw->mac_type < e1000_82571) in e1000_reset_hw()
1401 if (hw->mac_type == e1000_82542_rev2_0) { in e1000_reset_hw()
1404 dm_pci_write_config16(hw->pdev, PCI_COMMAND, in e1000_reset_hw()
1405 hw->pci_cmd_word & ~PCI_COMMAND_INVALIDATE); in e1000_reset_hw()
1407 pci_write_config_word(hw->pdev, PCI_COMMAND, in e1000_reset_hw()
1408 hw->pci_cmd_word & ~PCI_COMMAND_INVALIDATE); in e1000_reset_hw()
1414 if (hw->mac_type == e1000_igb) in e1000_reset_hw()
1427 hw->tbi_compatibility_on = false; in e1000_reset_hw()
1436 * the current PCI configuration. The global reset bit is self- in e1000_reset_hw()
1440 ctrl = E1000_READ_REG(hw, CTRL); in e1000_reset_hw()
1442 E1000_WRITE_REG(hw, CTRL, (ctrl | E1000_CTRL_RST)); in e1000_reset_hw()
1445 if (hw->mac_type == e1000_igb) { in e1000_reset_hw()
1453 } else if (hw->mac_type < e1000_82540) { in e1000_reset_hw()
1473 if (hw->mac_type == e1000_igb) in e1000_reset_hw()
1481 if (hw->mac_type == e1000_82542_rev2_0) { in e1000_reset_hw()
1483 dm_pci_write_config16(hw->pdev, PCI_COMMAND, hw->pci_cmd_word); in e1000_reset_hw()
1485 pci_write_config_word(hw->pdev, PCI_COMMAND, hw->pci_cmd_word); in e1000_reset_hw()
1488 if (hw->mac_type != e1000_igb) in e1000_reset_hw()
1494 * Initialize a number of hardware-dependent bits
1498 * This function contains hardware limitation workarounds for PCI-E adapters
1504 if ((hw->mac_type >= e1000_82571) && in e1000_initialize_hardware_bits()
1505 (!hw->initialize_hw_bits_disable)) { in e1000_initialize_hardware_bits()
1506 /* Settings common to all PCI-express silicon */ in e1000_initialize_hardware_bits()
1516 /* Enable not-done TX descriptor counting */ in e1000_initialize_hardware_bits()
1526 switch (hw->mac_type) { in e1000_initialize_hardware_bits()
1557 reg_ctrl = E1000_READ_REG(hw, CTRL); in e1000_initialize_hardware_bits()
1561 E1000_WRITE_REG(hw, CTRL, reg_ctrl); in e1000_initialize_hardware_bits()
1565 if ((hw->media_type == e1000_media_type_fiber) in e1000_initialize_hardware_bits()
1566 || (hw->media_type == in e1000_initialize_hardware_bits()
1583 if ((hw->revision_id < 3) || in e1000_initialize_hardware_bits()
1584 ((hw->device_id != E1000_DEV_ID_ICH8_IGP_M_AMT) && in e1000_initialize_hardware_bits()
1585 (hw->device_id != E1000_DEV_ID_ICH8_IGP_M))) in e1000_initialize_hardware_bits()
1619 * hw - Struct containing variables accessed by shared code
1622 * post-reset uninitialized state. Initializes the receive address registers,
1624 * configuration and flow control settings. Clears all on-chip counters. Leaves
1630 uint32_t ctrl; in e1000_init_hw() local
1641 /* force full DMA clock frequency for 10/100 on ICH8 A0-B0 */ in e1000_init_hw()
1642 if ((hw->mac_type == e1000_ich8lan) && in e1000_init_hw()
1643 ((hw->revision_id < 3) || in e1000_init_hw()
1644 ((hw->device_id != E1000_DEV_ID_ICH8_IGP_M_AMT) && in e1000_init_hw()
1645 (hw->device_id != E1000_DEV_ID_ICH8_IGP_M)))) { in e1000_init_hw()
1662 if (hw->mac_type != e1000_ich8lan) { in e1000_init_hw()
1663 if (hw->mac_type < e1000_82545_rev_3) in e1000_init_hw()
1669 if (hw->mac_type == e1000_82542_rev2_0) { in e1000_init_hw()
1672 dm_pci_write_config16(hw->pdev, PCI_COMMAND, in e1000_init_hw()
1673 hw-> in e1000_init_hw()
1676 pci_write_config_word(hw->pdev, PCI_COMMAND, in e1000_init_hw()
1677 hw-> in e1000_init_hw()
1686 * Address Registers (RARs 0 - 15). in e1000_init_hw()
1691 if (hw->mac_type == e1000_82542_rev2_0) { in e1000_init_hw()
1696 dm_pci_write_config16(hw->pdev, PCI_COMMAND, hw->pci_cmd_word); in e1000_init_hw()
1698 pci_write_config_word(hw->pdev, PCI_COMMAND, hw->pci_cmd_word); in e1000_init_hw()
1705 if (hw->mac_type == e1000_ich8lan) in e1000_init_hw()
1714 switch (hw->mac_type) { in e1000_init_hw()
1720 /* Workaround for PCI-X problem when BIOS sets MMRBC incorrectly. */ in e1000_init_hw()
1721 if (hw->bus_type == e1000_bus_type_pcix) { in e1000_init_hw()
1723 dm_pci_read_config16(hw->pdev, PCIX_COMMAND_REGISTER, in e1000_init_hw()
1725 dm_pci_read_config16(hw->pdev, PCIX_STATUS_REGISTER_HI, in e1000_init_hw()
1728 pci_read_config_word(hw->pdev, PCIX_COMMAND_REGISTER, in e1000_init_hw()
1730 pci_read_config_word(hw->pdev, PCIX_STATUS_REGISTER_HI, in e1000_init_hw()
1745 dm_pci_write_config16(hw->pdev, PCIX_COMMAND_REGISTER, in e1000_init_hw()
1748 pci_write_config_word(hw->pdev, PCIX_COMMAND_REGISTER, in e1000_init_hw()
1757 if (hw->mac_type == e1000_ich8lan) in e1000_init_hw()
1759 if (hw->mac_type == e1000_igb) in e1000_init_hw()
1762 /* Call a subroutine to configure the link and setup flow control. */ in e1000_init_hw()
1765 /* Set the transmit descriptor write-back policy */ in e1000_init_hw()
1766 if (hw->mac_type > e1000_82544) { in e1000_init_hw()
1767 ctrl = E1000_READ_REG(hw, TXDCTL); in e1000_init_hw()
1768 ctrl = in e1000_init_hw()
1769 (ctrl & ~E1000_TXDCTL_WTHRESH) | in e1000_init_hw()
1771 E1000_WRITE_REG(hw, TXDCTL, ctrl); in e1000_init_hw()
1775 if (hw->mac_type >= e1000_82571) { in e1000_init_hw()
1776 ctrl = E1000_READ_REG(hw, RXDCTL); in e1000_init_hw()
1777 ctrl = in e1000_init_hw()
1778 (ctrl & ~E1000_RXDCTL_WTHRESH) | in e1000_init_hw()
1780 E1000_WRITE_REG(hw, RXDCTL, ctrl); in e1000_init_hw()
1783 switch (hw->mac_type) { in e1000_init_hw()
1798 /* Configure Transmit Inter-Packet Gap */ in e1000_init_hw()
1811 ctrl = E1000_READ_REG(hw, TXDCTL1); in e1000_init_hw()
1812 ctrl = (ctrl & ~E1000_TXDCTL_WTHRESH) in e1000_init_hw()
1814 E1000_WRITE_REG(hw, TXDCTL1, ctrl); in e1000_init_hw()
1825 if (hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER || in e1000_init_hw()
1826 hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3) { in e1000_init_hw()
1838 * Configures flow control and link settings.
1840 * hw - Struct containing variables accessed by shared code
1842 * Determines which flow control settings to use. Calls the apropriate media-
1843 * specific link configuration function. Configures the flow control settings.
1866 * that determine the hardware's default PAUSE (flow control) mode, in e1000_setup_link()
1868 * disabling auto-negotiation, and the direction of the in e1000_setup_link()
1869 * SW defined pins. If there is no SW over-ride of the flow in e1000_setup_link()
1870 * control setting, then the variable hw->fc will in e1000_setup_link()
1876 return -E1000_ERR_EEPROM; in e1000_setup_link()
1879 if (hw->fc == e1000_fc_default) { in e1000_setup_link()
1880 switch (hw->mac_type) { in e1000_setup_link()
1885 hw->fc = e1000_fc_full; in e1000_setup_link()
1893 return -E1000_ERR_EEPROM; in e1000_setup_link()
1896 hw->fc = e1000_fc_none; in e1000_setup_link()
1899 hw->fc = e1000_fc_tx_pause; in e1000_setup_link()
1902 hw->fc = e1000_fc_full; in e1000_setup_link()
1907 /* We want to save off the original Flow Control configuration just in e1000_setup_link()
1909 * hub or switch with different Flow Control capabilities. in e1000_setup_link()
1911 if (hw->mac_type == e1000_82542_rev2_0) in e1000_setup_link()
1912 hw->fc &= (~e1000_fc_tx_pause); in e1000_setup_link()
1914 if ((hw->mac_type < e1000_82543) && (hw->report_tx_early == 1)) in e1000_setup_link()
1915 hw->fc &= (~e1000_fc_rx_pause); in e1000_setup_link()
1917 hw->original_fc = hw->fc; in e1000_setup_link()
1919 DEBUGOUT("After fix-ups FlowControl is now = %x\n", hw->fc); in e1000_setup_link()
1929 if (hw->mac_type == e1000_82543) { in e1000_setup_link()
1937 ret_val = (hw->media_type == e1000_media_type_fiber) ? in e1000_setup_link()
1943 /* Initialize the flow control address, type, and PAUSE timer in e1000_setup_link()
1944 * registers to their default values. This is done even if flow in e1000_setup_link()
1948 DEBUGOUT("Initializing the Flow Control address, type" in e1000_setup_link()
1952 if (hw->mac_type != e1000_ich8lan) { in e1000_setup_link()
1958 E1000_WRITE_REG(hw, FCTTV, hw->fc_pause_time); in e1000_setup_link()
1960 /* Set the flow control receive threshold registers. Normally, in e1000_setup_link()
1966 if (!(hw->fc & e1000_fc_tx_pause)) { in e1000_setup_link()
1973 if (hw->fc_send_xon) { in e1000_setup_link()
1975 (hw->fc_low_water | E1000_FCRTL_XONE)); in e1000_setup_link()
1976 E1000_WRITE_REG(hw, FCRTH, hw->fc_high_water); in e1000_setup_link()
1978 E1000_WRITE_REG(hw, FCRTL, hw->fc_low_water); in e1000_setup_link()
1979 E1000_WRITE_REG(hw, FCRTH, hw->fc_high_water); in e1000_setup_link()
1988 * hw - Struct containing variables accessed by shared code
1997 uint32_t ctrl; in e1000_setup_fiber_link() local
2009 ctrl = E1000_READ_REG(hw, CTRL); in e1000_setup_fiber_link()
2010 if ((hw->mac_type > e1000_82544) && !(ctrl & E1000_CTRL_ILOS)) in e1000_setup_fiber_link()
2015 printf("signal for %s is %x (ctrl %08x)!!!!\n", hw->name, signal, in e1000_setup_fiber_link()
2016 ctrl); in e1000_setup_fiber_link()
2018 ctrl &= ~(E1000_CTRL_LRST); in e1000_setup_fiber_link()
2022 /* Check for a software override of the flow control settings, and setup in e1000_setup_fiber_link()
2023 * the device accordingly. If auto-negotiation is enabled, then software in e1000_setup_fiber_link()
2025 * Config Word Register (TXCW) and re-start auto-negotiation. However, if in e1000_setup_fiber_link()
2026 * auto-negotiation is disabled, then software will have to manually in e1000_setup_fiber_link()
2027 * configure the two flow control enable bits in the CTRL register. in e1000_setup_fiber_link()
2030 * 0: Flow control is completely disabled in e1000_setup_fiber_link()
2031 * 1: Rx flow control is enabled (we can receive pause frames, but in e1000_setup_fiber_link()
2033 * 2: Tx flow control is enabled (we can send pause frames but we do in e1000_setup_fiber_link()
2035 * 3: Both Rx and TX flow control (symmetric) are enabled. in e1000_setup_fiber_link()
2037 switch (hw->fc) { in e1000_setup_fiber_link()
2039 /* Flow control is completely disabled by a software over-ride. */ in e1000_setup_fiber_link()
2043 /* RX Flow control is enabled and TX Flow control is disabled by a in e1000_setup_fiber_link()
2044 * software over-ride. Since there really isn't a way to advertise in e1000_setup_fiber_link()
2052 /* TX Flow control is enabled, and RX Flow control is disabled, by a in e1000_setup_fiber_link()
2053 * software over-ride. in e1000_setup_fiber_link()
2058 /* Flow control (both RX and TX) is enabled by a software over-ride. */ in e1000_setup_fiber_link()
2062 DEBUGOUT("Flow control param set incorrectly\n"); in e1000_setup_fiber_link()
2063 return -E1000_ERR_CONFIG; in e1000_setup_fiber_link()
2067 /* Since auto-negotiation is enabled, take the link out of reset (the link in e1000_setup_fiber_link()
2069 * restart auto-negotiation. If auto-neogtiation is successful then the in e1000_setup_fiber_link()
2070 * link-up status bit will be set and the flow control enable bits (RFCE in e1000_setup_fiber_link()
2073 DEBUGOUT("Auto-negotiation enabled (%#x)\n", txcw); in e1000_setup_fiber_link()
2076 E1000_WRITE_REG(hw, CTRL, ctrl); in e1000_setup_fiber_link()
2079 hw->txcw = txcw; in e1000_setup_fiber_link()
2082 /* If we have a signal (the cable is plugged in) then poll for a "Link-Up" in e1000_setup_fiber_link()
2083 * indication in the Device Status Register. Time-out if a link isn't in e1000_setup_fiber_link()
2084 * seen in 500 milliseconds seconds (Auto-negotiation should complete in in e1000_setup_fiber_link()
2087 if ((E1000_READ_REG(hw, CTRL) & E1000_CTRL_SWDPIN1) == signal) { in e1000_setup_fiber_link()
2099 * non-autonegotiating link partners. in e1000_setup_fiber_link()
2101 DEBUGOUT("Never got a valid link from auto-neg!!!\n"); in e1000_setup_fiber_link()
2102 hw->autoneg_failed = 1; in e1000_setup_fiber_link()
2108 hw->autoneg_failed = 0; in e1000_setup_fiber_link()
2110 hw->autoneg_failed = 0; in e1000_setup_fiber_link()
2115 return -E1000_ERR_NOLINK; in e1000_setup_fiber_link()
2123 * hw - Struct containing variables accessed by shared code
2128 uint32_t ctrl; in e1000_copper_link_preconfig() local
2134 ctrl = E1000_READ_REG(hw, CTRL); in e1000_copper_link_preconfig()
2139 if (hw->mac_type > e1000_82543) { in e1000_copper_link_preconfig()
2140 ctrl |= E1000_CTRL_SLU; in e1000_copper_link_preconfig()
2141 ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX); in e1000_copper_link_preconfig()
2142 E1000_WRITE_REG(hw, CTRL, ctrl); in e1000_copper_link_preconfig()
2144 ctrl |= (E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX in e1000_copper_link_preconfig()
2146 E1000_WRITE_REG(hw, CTRL, ctrl); in e1000_copper_link_preconfig()
2158 DEBUGOUT("Phy ID = %x\n", hw->phy_id); in e1000_copper_link_preconfig()
2164 if ((hw->mac_type == e1000_82545_rev_3) || in e1000_copper_link_preconfig()
2165 (hw->mac_type == e1000_82546_rev_3)) { in e1000_copper_link_preconfig()
2173 if (hw->mac_type <= e1000_82543 || in e1000_copper_link_preconfig()
2174 hw->mac_type == e1000_82541 || hw->mac_type == e1000_82547 || in e1000_copper_link_preconfig()
2175 hw->mac_type == e1000_82541_rev_2 in e1000_copper_link_preconfig()
2176 || hw->mac_type == e1000_82547_rev_2) in e1000_copper_link_preconfig()
2177 hw->phy_reset_disable = false; in e1000_copper_link_preconfig()
2189 * active - true to enable lplu false to disable lplu.
2191 * returns: - E1000_ERR_PHY if fail to read/write the PHY
2204 if (hw->phy_type != e1000_phy_igp && hw->phy_type != e1000_phy_igp_2 in e1000_set_d3_lplu_state()
2205 && hw->phy_type != e1000_phy_igp_3) in e1000_set_d3_lplu_state()
2211 if (hw->mac_type == e1000_82541_rev_2 in e1000_set_d3_lplu_state()
2212 || hw->mac_type == e1000_82547_rev_2) { in e1000_set_d3_lplu_state()
2217 } else if (hw->mac_type == e1000_ich8lan) { in e1000_set_d3_lplu_state()
2219 * and start auto-negotiation. SW driver can overwrite the in e1000_set_d3_lplu_state()
2230 if (hw->mac_type == e1000_82541_rev_2 || in e1000_set_d3_lplu_state()
2231 hw->mac_type == e1000_82547_rev_2) { in e1000_set_d3_lplu_state()
2238 if (hw->mac_type == e1000_ich8lan) { in e1000_set_d3_lplu_state()
2254 if (hw->smart_speed == e1000_smart_speed_on) { in e1000_set_d3_lplu_state()
2265 } else if (hw->smart_speed == e1000_smart_speed_off) { in e1000_set_d3_lplu_state()
2278 } else if ((hw->autoneg_advertised == AUTONEG_ADVERTISE_SPEED_DEFAULT) in e1000_set_d3_lplu_state()
2279 || (hw->autoneg_advertised == AUTONEG_ADVERTISE_10_ALL) || in e1000_set_d3_lplu_state()
2280 (hw->autoneg_advertised == AUTONEG_ADVERTISE_10_100_ALL)) { in e1000_set_d3_lplu_state()
2282 if (hw->mac_type == e1000_82541_rev_2 || in e1000_set_d3_lplu_state()
2283 hw->mac_type == e1000_82547_rev_2) { in e1000_set_d3_lplu_state()
2290 if (hw->mac_type == e1000_ich8lan) { in e1000_set_d3_lplu_state()
2324 * active - true to enable lplu false to disable lplu.
2326 * returns: - E1000_ERR_PHY if fail to read/write the PHY
2339 if (hw->mac_type <= e1000_82547_rev_2) in e1000_set_d0_lplu_state()
2342 if (hw->mac_type == e1000_ich8lan) { in e1000_set_d0_lplu_state()
2344 } else if (hw->mac_type == e1000_igb) { in e1000_set_d0_lplu_state()
2354 if (hw->mac_type == e1000_ich8lan) { in e1000_set_d0_lplu_state()
2357 } else if (hw->mac_type == e1000_igb) { in e1000_set_d0_lplu_state()
2368 if (hw->mac_type == e1000_igb) in e1000_set_d0_lplu_state()
2375 if (hw->smart_speed == e1000_smart_speed_on) { in e1000_set_d0_lplu_state()
2386 } else if (hw->smart_speed == e1000_smart_speed_off) { in e1000_set_d0_lplu_state()
2402 if (hw->mac_type == e1000_ich8lan) { in e1000_set_d0_lplu_state()
2405 } else if (hw->mac_type == e1000_igb) { in e1000_set_d0_lplu_state()
2416 if (hw->mac_type == e1000_igb) in e1000_set_d0_lplu_state()
2438 * hw - Struct containing variables accessed by shared code
2449 if (hw->phy_reset_disable) in e1000_copper_link_igp_setup()
2460 if (hw->mac_type != e1000_ich8lan) { in e1000_copper_link_igp_setup()
2469 if (hw->phy_type == e1000_phy_igp) { in e1000_copper_link_igp_setup()
2484 /* Configure mdi-mdix settings */ in e1000_copper_link_igp_setup()
2489 if ((hw->mac_type == e1000_82541) || (hw->mac_type == e1000_82547)) { in e1000_copper_link_igp_setup()
2490 hw->dsp_config_state = e1000_dsp_config_disabled; in e1000_copper_link_igp_setup()
2494 hw->mdix = 1; in e1000_copper_link_igp_setup()
2497 hw->dsp_config_state = e1000_dsp_config_enabled; in e1000_copper_link_igp_setup()
2500 switch (hw->mdix) { in e1000_copper_link_igp_setup()
2517 /* set auto-master slave resolution settings */ in e1000_copper_link_igp_setup()
2518 if (hw->autoneg) { in e1000_copper_link_igp_setup()
2519 e1000_ms_type phy_ms_setting = hw->master_slave; in e1000_copper_link_igp_setup()
2521 if (hw->ffe_config_state == e1000_ffe_config_active) in e1000_copper_link_igp_setup()
2522 hw->ffe_config_state = e1000_ffe_config_enabled; in e1000_copper_link_igp_setup()
2524 if (hw->dsp_config_state == e1000_dsp_config_activated) in e1000_copper_link_igp_setup()
2525 hw->dsp_config_state = e1000_dsp_config_enabled; in e1000_copper_link_igp_setup()
2530 if (hw->autoneg_advertised == ADVERTISE_1000_FULL) { in e1000_copper_link_igp_setup()
2558 hw->original_master_slave = (phy_data & CR_1000T_MS_ENABLE) ? in e1000_copper_link_igp_setup()
2588 * returns - true when the mode is IAMT or false.
2598 if (hw->mac_type == e1000_ich8lan) { in e1000_check_mng_mode()
2620 return -E1000_ERR_SWFW_SYNC; in e1000_write_kmrn_reg()
2642 return -E1000_ERR_SWFW_SYNC; in e1000_read_kmrn_reg()
2661 * hw - Struct containing variables accessed by shared code
2672 if (!hw->phy_reset_disable) { in e1000_copper_link_ggp_setup()
2673 /* Enable CRS on TX for half-duplex operation. */ in e1000_copper_link_ggp_setup()
2680 /* Use 25MHz for both link down and 1000BASE-T for Tx clock */ in e1000_copper_link_ggp_setup()
2689 * MDI/MDI-X = 0 (default) in e1000_copper_link_ggp_setup()
2690 * 0 - Auto for all speeds in e1000_copper_link_ggp_setup()
2691 * 1 - MDI mode in e1000_copper_link_ggp_setup()
2692 * 2 - MDI-X mode in e1000_copper_link_ggp_setup()
2693 * 3 - Auto for 1000Base-T only (MDI-X for 10/100Base-T modes) in e1000_copper_link_ggp_setup()
2702 switch (hw->mdix) { in e1000_copper_link_ggp_setup()
2718 * 0 - Disabled in e1000_copper_link_ggp_setup()
2719 * 1 - Enabled in e1000_copper_link_ggp_setup()
2736 if (hw->mac_type == e1000_80003es2lan) { in e1000_copper_link_ggp_setup()
2810 * hw - Struct containing variables accessed by shared code
2820 if (hw->phy_reset_disable) in e1000_copper_link_mgp_setup()
2823 /* Enable CRS on TX. This must be set for half-duplex operation. */ in e1000_copper_link_mgp_setup()
2831 * MDI/MDI-X = 0 (default) in e1000_copper_link_mgp_setup()
2832 * 0 - Auto for all speeds in e1000_copper_link_mgp_setup()
2833 * 1 - MDI mode in e1000_copper_link_mgp_setup()
2834 * 2 - MDI-X mode in e1000_copper_link_mgp_setup()
2835 * 3 - Auto for 1000Base-T only (MDI-X for 10/100Base-T modes) in e1000_copper_link_mgp_setup()
2839 switch (hw->mdix) { in e1000_copper_link_mgp_setup()
2858 * 0 - Disabled in e1000_copper_link_mgp_setup()
2859 * 1 - Enabled in e1000_copper_link_mgp_setup()
2866 if (hw->phy_revision < M88E1011_I_REV_4) { in e1000_copper_link_mgp_setup()
2877 if ((hw->phy_revision == E1000_REVISION_2) && in e1000_copper_link_mgp_setup()
2878 (hw->phy_id == M88E1111_I_PHY_ID)) { in e1000_copper_link_mgp_setup()
2910 * Setup auto-negotiation and flow control advertisements,
2911 * and then perform auto-negotiation.
2913 * hw - Struct containing variables accessed by shared code
2923 /* Perform some bounds checking on the hw->autoneg_advertised in e1000_copper_link_autoneg()
2926 hw->autoneg_advertised &= AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_copper_link_autoneg()
2931 if (hw->autoneg_advertised == 0) in e1000_copper_link_autoneg()
2932 hw->autoneg_advertised = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_copper_link_autoneg()
2935 if (hw->phy_type == e1000_phy_ife) in e1000_copper_link_autoneg()
2936 hw->autoneg_advertised &= AUTONEG_ADVERTISE_10_100_ALL; in e1000_copper_link_autoneg()
2938 DEBUGOUT("Reconfiguring auto-neg advertisement params\n"); in e1000_copper_link_autoneg()
2941 DEBUGOUT("Error Setting up Auto-Negotiation\n"); in e1000_copper_link_autoneg()
2944 DEBUGOUT("Restarting Auto-Neg\n"); in e1000_copper_link_autoneg()
2946 /* Restart auto-negotiation by setting the Auto Neg Enable bit and in e1000_copper_link_autoneg()
2958 /* Does the user want to wait for Auto-Neg to complete here, or in e1000_copper_link_autoneg()
2965 if (hw->wait_autoneg_complete) { in e1000_copper_link_autoneg()
2974 hw->get_link_status = true; in e1000_copper_link_autoneg()
2985 * 2) Set up flow control on the MAC to that established with
2989 * hw - Struct containing variables accessed by shared code
2997 if (hw->mac_type >= e1000_82544) { in e1000_copper_link_postconfig()
3008 DEBUGOUT("Error Configuring Flow Control\n"); in e1000_copper_link_postconfig()
3017 * hw - Struct containing variables accessed by shared code
3029 switch (hw->mac_type) { in e1000_setup_copper_link()
3056 switch (hw->mac_type) { in e1000_setup_copper_link()
3058 /* Kumeran registers are written-only */ in e1000_setup_copper_link()
3071 if (hw->phy_type == e1000_phy_igp || in e1000_setup_copper_link()
3072 hw->phy_type == e1000_phy_igp_3 || in e1000_setup_copper_link()
3073 hw->phy_type == e1000_phy_igp_2) { in e1000_setup_copper_link()
3077 } else if (hw->phy_type == e1000_phy_m88 || in e1000_setup_copper_link()
3078 hw->phy_type == e1000_phy_igb) { in e1000_setup_copper_link()
3082 } else if (hw->phy_type == e1000_phy_gg82563) { in e1000_setup_copper_link()
3089 /* Setup autoneg and flow control advertisement in e1000_setup_copper_link()
3123 * Configures PHY autoneg and flow control advertisement settings
3125 * hw - Struct containing variables accessed by shared code
3136 /* Read the MII Auto-Neg Advertisement Register (Address 4). */ in e1000_phy_setup_autoneg()
3141 if (hw->phy_type != e1000_phy_ife) { in e1000_phy_setup_autoneg()
3142 /* Read the MII 1000Base-T Control Register (Address 9). */ in e1000_phy_setup_autoneg()
3157 /* First we clear all the 10/100 mb speed bits in the Auto-Neg in e1000_phy_setup_autoneg()
3159 * the 1000Base-T Control Register (Address 9). in e1000_phy_setup_autoneg()
3164 DEBUGOUT("autoneg_advertised %x\n", hw->autoneg_advertised); in e1000_phy_setup_autoneg()
3167 if (hw->autoneg_advertised & ADVERTISE_10_HALF) { in e1000_phy_setup_autoneg()
3173 if (hw->autoneg_advertised & ADVERTISE_10_FULL) { in e1000_phy_setup_autoneg()
3179 if (hw->autoneg_advertised & ADVERTISE_100_HALF) { in e1000_phy_setup_autoneg()
3185 if (hw->autoneg_advertised & ADVERTISE_100_FULL) { in e1000_phy_setup_autoneg()
3191 if (hw->autoneg_advertised & ADVERTISE_1000_HALF) { in e1000_phy_setup_autoneg()
3197 if (hw->autoneg_advertised & ADVERTISE_1000_FULL) { in e1000_phy_setup_autoneg()
3202 /* Check for a software override of the flow control settings, and in e1000_phy_setup_autoneg()
3204 * auto-negotiation is enabled, then software will have to set the in e1000_phy_setup_autoneg()
3205 * "PAUSE" bits to the correct value in the Auto-Negotiation in e1000_phy_setup_autoneg()
3206 * Advertisement Register (PHY_AUTONEG_ADV) and re-start auto-negotiation. in e1000_phy_setup_autoneg()
3209 * 0: Flow control is completely disabled in e1000_phy_setup_autoneg()
3210 * 1: Rx flow control is enabled (we can receive pause frames in e1000_phy_setup_autoneg()
3212 * 2: Tx flow control is enabled (we can send pause frames in e1000_phy_setup_autoneg()
3214 * 3: Both Rx and TX flow control (symmetric) are enabled. in e1000_phy_setup_autoneg()
3215 * other: No software override. The flow control configuration in e1000_phy_setup_autoneg()
3218 switch (hw->fc) { in e1000_phy_setup_autoneg()
3220 /* Flow control (RX & TX) is completely disabled by a in e1000_phy_setup_autoneg()
3221 * software over-ride. in e1000_phy_setup_autoneg()
3226 /* RX Flow control is enabled, and TX Flow control is in e1000_phy_setup_autoneg()
3227 * disabled, by a software over-ride. in e1000_phy_setup_autoneg()
3238 /* TX Flow control is enabled, and RX Flow control is in e1000_phy_setup_autoneg()
3239 * disabled, by a software over-ride. in e1000_phy_setup_autoneg()
3245 /* Flow control (both RX and TX) is enabled by a software in e1000_phy_setup_autoneg()
3246 * over-ride. in e1000_phy_setup_autoneg()
3251 DEBUGOUT("Flow control param set incorrectly\n"); in e1000_phy_setup_autoneg()
3252 return -E1000_ERR_CONFIG; in e1000_phy_setup_autoneg()
3259 DEBUGOUT("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg); in e1000_phy_setup_autoneg()
3261 if (hw->phy_type != e1000_phy_ife) { in e1000_phy_setup_autoneg()
3274 * hw - Struct containing variables accessed by shared code
3286 if (hw->mac_type < e1000_82543) in e1000_config_collision_dist()
3303 * hw - Struct containing variables accessed by shared code
3304 * mii_reg - data to write to the MII control register
3312 uint32_t ctrl; in e1000_config_mac_to_phy() local
3320 ctrl = E1000_READ_REG(hw, CTRL); in e1000_config_mac_to_phy()
3321 ctrl |= (E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX); in e1000_config_mac_to_phy()
3322 ctrl &= ~(E1000_CTRL_ILOS); in e1000_config_mac_to_phy()
3323 ctrl |= (E1000_CTRL_SPD_SEL); in e1000_config_mac_to_phy()
3330 return -E1000_ERR_PHY; in e1000_config_mac_to_phy()
3333 ctrl |= E1000_CTRL_FD; in e1000_config_mac_to_phy()
3335 ctrl &= ~E1000_CTRL_FD; in e1000_config_mac_to_phy()
3343 ctrl |= E1000_CTRL_SPD_1000; in e1000_config_mac_to_phy()
3345 ctrl |= E1000_CTRL_SPD_100; in e1000_config_mac_to_phy()
3347 E1000_WRITE_REG(hw, CTRL, ctrl); in e1000_config_mac_to_phy()
3352 * Forces the MAC's flow control settings.
3354 * hw - Struct containing variables accessed by shared code
3365 uint32_t ctrl; in e1000_force_mac_fc() local
3370 ctrl = E1000_READ_REG(hw, CTRL); in e1000_force_mac_fc()
3372 /* Because we didn't get link via the internal auto-negotiation in e1000_force_mac_fc()
3374 * auto-neg), we have to manually enable/disable transmit an in e1000_force_mac_fc()
3375 * receive flow control. in e1000_force_mac_fc()
3377 * The "Case" statement below enables/disable flow control in e1000_force_mac_fc()
3378 * according to the "hw->fc" parameter. in e1000_force_mac_fc()
3381 * 0: Flow control is completely disabled in e1000_force_mac_fc()
3382 * 1: Rx flow control is enabled (we can receive pause in e1000_force_mac_fc()
3384 * 2: Tx flow control is enabled (we can send pause frames in e1000_force_mac_fc()
3386 * 3: Both Rx and TX flow control (symmetric) is enabled. in e1000_force_mac_fc()
3390 switch (hw->fc) { in e1000_force_mac_fc()
3392 ctrl &= (~(E1000_CTRL_TFCE | E1000_CTRL_RFCE)); in e1000_force_mac_fc()
3395 ctrl &= (~E1000_CTRL_TFCE); in e1000_force_mac_fc()
3396 ctrl |= E1000_CTRL_RFCE; in e1000_force_mac_fc()
3399 ctrl &= (~E1000_CTRL_RFCE); in e1000_force_mac_fc()
3400 ctrl |= E1000_CTRL_TFCE; in e1000_force_mac_fc()
3403 ctrl |= (E1000_CTRL_TFCE | E1000_CTRL_RFCE); in e1000_force_mac_fc()
3406 DEBUGOUT("Flow control param set incorrectly\n"); in e1000_force_mac_fc()
3407 return -E1000_ERR_CONFIG; in e1000_force_mac_fc()
3410 /* Disable TX Flow Control for 82542 (rev 2.0) */ in e1000_force_mac_fc()
3411 if (hw->mac_type == e1000_82542_rev2_0) in e1000_force_mac_fc()
3412 ctrl &= (~E1000_CTRL_TFCE); in e1000_force_mac_fc()
3414 E1000_WRITE_REG(hw, CTRL, ctrl); in e1000_force_mac_fc()
3419 * Configures flow control settings after link is established
3421 * hw - Struct containing variables accessed by shared code
3424 * Forces MAC flow control settings if link was forced. When in MII/GMII mode
3425 * and autonegotiation is enabled, the MAC flow control settings will be set
3426 * based on the flow control negotiated by the PHY. In TBI mode, the TFCE
3427 * and RFCE bits will be automaticaly set to the negotiated flow control mode.
3441 /* Check for the case where we have fiber media and auto-neg failed in e1000_config_fc_after_link_up()
3445 if (((hw->media_type == e1000_media_type_fiber) && (hw->autoneg_failed)) in e1000_config_fc_after_link_up()
3446 || ((hw->media_type == e1000_media_type_internal_serdes) in e1000_config_fc_after_link_up()
3447 && (hw->autoneg_failed)) in e1000_config_fc_after_link_up()
3448 || ((hw->media_type == e1000_media_type_copper) in e1000_config_fc_after_link_up()
3449 && (!hw->autoneg))) { in e1000_config_fc_after_link_up()
3452 DEBUGOUT("Error forcing flow control settings\n"); in e1000_config_fc_after_link_up()
3457 /* Check for the case where we have copper media and auto-neg is in e1000_config_fc_after_link_up()
3458 * enabled. In this case, we need to check and see if Auto-Neg in e1000_config_fc_after_link_up()
3460 * flow control configured. in e1000_config_fc_after_link_up()
3462 if (hw->media_type == e1000_media_type_copper) { in e1000_config_fc_after_link_up()
3469 return -E1000_ERR_PHY; in e1000_config_fc_after_link_up()
3473 return -E1000_ERR_PHY; in e1000_config_fc_after_link_up()
3480 * Register (Address 5) to determine how flow control was in e1000_config_fc_after_link_up()
3486 return -E1000_ERR_PHY; in e1000_config_fc_after_link_up()
3492 return -E1000_ERR_PHY; in e1000_config_fc_after_link_up()
3497 * Page Ability Register (Address 5) determine flow control in e1000_config_fc_after_link_up()
3500 * 1999, describes these PAUSE resolution bits and how flow in e1000_config_fc_after_link_up()
3506 *-------|---------|-------|---------|-------------------- in e1000_config_fc_after_link_up()
3518 * Symmetric Flow Control is enabled at both ends. The in e1000_config_fc_after_link_up()
3521 * For Symmetric Flow Control: in e1000_config_fc_after_link_up()
3525 *-------|---------|-------|---------|-------------------- in e1000_config_fc_after_link_up()
3533 * FULL flow control because we could not advertise RX in e1000_config_fc_after_link_up()
3537 if (hw->original_fc == e1000_fc_full) { in e1000_config_fc_after_link_up()
3538 hw->fc = e1000_fc_full; in e1000_config_fc_after_link_up()
3539 DEBUGOUT("Flow Control = FULL.\r\n"); in e1000_config_fc_after_link_up()
3541 hw->fc = e1000_fc_rx_pause; in e1000_config_fc_after_link_up()
3543 ("Flow Control = RX PAUSE frames only.\r\n"); in e1000_config_fc_after_link_up()
3550 *-------|---------|-------|---------|-------------------- in e1000_config_fc_after_link_up()
3559 hw->fc = e1000_fc_tx_pause; in e1000_config_fc_after_link_up()
3561 ("Flow Control = TX PAUSE frames only.\r\n"); in e1000_config_fc_after_link_up()
3567 *-------|---------|-------|---------|-------------------- in e1000_config_fc_after_link_up()
3576 hw->fc = e1000_fc_rx_pause; in e1000_config_fc_after_link_up()
3578 ("Flow Control = RX PAUSE frames only.\r\n"); in e1000_config_fc_after_link_up()
3580 /* Per the IEEE spec, at this point flow control should be in e1000_config_fc_after_link_up()
3583 * desired flow control, but can be forced on the link in e1000_config_fc_after_link_up()
3584 * partner. So if we advertised no flow control, that is in e1000_config_fc_after_link_up()
3586 * receive capability (Rx Pause Only or Full Flow Control) in e1000_config_fc_after_link_up()
3588 * ourselves to enable Rx Flow Control only. We can do in e1000_config_fc_after_link_up()
3590 * didn't want flow control enabled, and we enable Rx, no in e1000_config_fc_after_link_up()
3593 * flow control enabled, then by us enabling RX only, we in e1000_config_fc_after_link_up()
3600 else if (hw->original_fc == e1000_fc_none || in e1000_config_fc_after_link_up()
3601 hw->original_fc == e1000_fc_tx_pause) { in e1000_config_fc_after_link_up()
3602 hw->fc = e1000_fc_none; in e1000_config_fc_after_link_up()
3603 DEBUGOUT("Flow Control = NONE.\r\n"); in e1000_config_fc_after_link_up()
3605 hw->fc = e1000_fc_rx_pause; in e1000_config_fc_after_link_up()
3607 ("Flow Control = RX PAUSE frames only.\r\n"); in e1000_config_fc_after_link_up()
3610 /* Now we need to do one last check... If we auto- in e1000_config_fc_after_link_up()
3611 * negotiated to HALF DUPLEX, flow control should not be in e1000_config_fc_after_link_up()
3617 hw->fc = e1000_fc_none; in e1000_config_fc_after_link_up()
3620 * controller to use the correct flow control settings. in e1000_config_fc_after_link_up()
3625 ("Error forcing flow control settings\n"); in e1000_config_fc_after_link_up()
3639 * hw - Struct containing variables accessed by shared code
3647 uint32_t ctrl; in e1000_check_for_link() local
3661 ctrl = E1000_READ_REG(hw, CTRL); in e1000_check_for_link()
3662 if ((hw->mac_type > e1000_82544) && !(ctrl & E1000_CTRL_ILOS)) in e1000_check_for_link()
3669 DEBUGOUT("ctrl: %#08x status %#08x rxcw %#08x\n", ctrl, status, rxcw); in e1000_check_for_link()
3672 * registers to see if Auto-Neg has completed and/or if our link in e1000_check_for_link()
3677 if ((hw->media_type == e1000_media_type_copper) && hw->get_link_status) { in e1000_check_for_link()
3685 return -E1000_ERR_PHY; in e1000_check_for_link()
3689 return -E1000_ERR_PHY; in e1000_check_for_link()
3693 hw->get_link_status = false; in e1000_check_for_link()
3696 return -E1000_ERR_NOLINK; in e1000_check_for_link()
3699 /* We have a M88E1000 PHY and Auto-Neg is enabled. If we in e1000_check_for_link()
3707 if (hw->mac_type >= e1000_82544) in e1000_check_for_link()
3718 /* Configure Flow Control now that Auto-Neg has completed. First, we in e1000_check_for_link()
3719 * need to restore the desired flow control settings because we may in e1000_check_for_link()
3720 * have had to re-autoneg with a different link partner. in e1000_check_for_link()
3724 DEBUGOUT("Error configuring flow control\n"); in e1000_check_for_link()
3729 * auto-negotiated link. These are conditions for checking the link in e1000_check_for_link()
3733 * we assume that they are GMII-based, and TBI compatibility is not in e1000_check_for_link()
3735 * partner is TBI-based, and we turn on TBI Compatibility. in e1000_check_for_link()
3737 if (hw->tbi_compatibility_en) { in e1000_check_for_link()
3741 return -E1000_ERR_PHY; in e1000_check_for_link()
3751 if (hw->tbi_compatibility_on) { in e1000_check_for_link()
3756 hw->tbi_compatibility_on = false; in e1000_check_for_link()
3764 if (!hw->tbi_compatibility_on) { in e1000_check_for_link()
3765 hw->tbi_compatibility_on = true; in e1000_check_for_link()
3773 /* If we don't have link (auto-negotiation failed or link partner cannot in e1000_check_for_link()
3774 * auto-negotiate), the cable is plugged in (we have signal), and our in e1000_check_for_link()
3775 * link partner is not trying to auto-negotiate with us (we are receiving in e1000_check_for_link()
3777 * auto-negotiation time to complete, in case the cable was just plugged in e1000_check_for_link()
3780 else if ((hw->media_type == e1000_media_type_fiber) && in e1000_check_for_link()
3782 ((ctrl & E1000_CTRL_SWDPIN1) == signal) && in e1000_check_for_link()
3784 if (hw->autoneg_failed == 0) { in e1000_check_for_link()
3785 hw->autoneg_failed = 1; in e1000_check_for_link()
3790 /* Disable auto-negotiation in the TXCW register */ in e1000_check_for_link()
3791 E1000_WRITE_REG(hw, TXCW, (hw->txcw & ~E1000_TXCW_ANE)); in e1000_check_for_link()
3793 /* Force link-up and also force full-duplex. */ in e1000_check_for_link()
3794 ctrl = E1000_READ_REG(hw, CTRL); in e1000_check_for_link()
3795 ctrl |= (E1000_CTRL_SLU | E1000_CTRL_FD); in e1000_check_for_link()
3796 E1000_WRITE_REG(hw, CTRL, ctrl); in e1000_check_for_link()
3798 /* Configure Flow Control after forcing link up. */ in e1000_check_for_link()
3801 DEBUGOUT("Error configuring flow control\n"); in e1000_check_for_link()
3805 /* If we are forcing link and we are receiving /C/ ordered sets, re-enable in e1000_check_for_link()
3806 * auto-negotiation in the TXCW register and disable forced link in the in e1000_check_for_link()
3807 * Device Control register in an attempt to auto-negotiate with our link in e1000_check_for_link()
3810 else if ((hw->media_type == e1000_media_type_fiber) && in e1000_check_for_link()
3811 (ctrl & E1000_CTRL_SLU) && (rxcw & E1000_RXCW_C)) { in e1000_check_for_link()
3814 E1000_WRITE_REG(hw, TXCW, hw->txcw); in e1000_check_for_link()
3815 E1000_WRITE_REG(hw, CTRL, (ctrl & ~E1000_CTRL_SLU)); in e1000_check_for_link()
3821 * Configure the MAC-to-PHY interface for 10/100Mbps
3823 * hw - Struct containing variables accessed by shared code
3840 /* Configure Transmit Inter-Packet Gap */ in e1000_configure_kmrn_for_10_100()
3876 /* Configure Transmit Inter-Packet Gap */ in e1000_configure_kmrn_for_1000()
3896 * hw - Struct containing variables accessed by shared code
3897 * speed - Speed of the connection
3898 * duplex - Duplex setting of the connection
3910 if (hw->mac_type >= e1000_82543) { in e1000_get_speed_and_duplex()
3940 if (hw->phy_type == e1000_phy_igp && hw->speed_downgraded) { in e1000_get_speed_and_duplex()
3960 if ((hw->mac_type == e1000_80003es2lan) && in e1000_get_speed_and_duplex()
3961 (hw->media_type == e1000_media_type_copper)) { in e1000_get_speed_and_duplex()
3975 * hw - Struct containing variables accessed by shared code
3984 DEBUGOUT("Waiting for Auto-Neg to complete.\n"); in e1000_wait_autoneg()
3987 for (i = PHY_AUTO_NEG_TIME; i > 0; i--) { in e1000_wait_autoneg()
3988 /* Read the MII Status Register and wait for Auto-Neg in e1000_wait_autoneg()
3993 return -E1000_ERR_PHY; in e1000_wait_autoneg()
3997 return -E1000_ERR_PHY; in e1000_wait_autoneg()
4000 DEBUGOUT("Auto-Neg complete.\n"); in e1000_wait_autoneg()
4005 DEBUGOUT("Auto-Neg timedout.\n"); in e1000_wait_autoneg()
4006 return -E1000_ERR_TIMEOUT; in e1000_wait_autoneg()
4012 * hw - Struct containing variables accessed by shared code
4013 * ctrl - Device control register's current value
4016 e1000_raise_mdi_clk(struct e1000_hw *hw, uint32_t * ctrl) in e1000_raise_mdi_clk() argument
4021 E1000_WRITE_REG(hw, CTRL, (*ctrl | E1000_CTRL_MDC)); in e1000_raise_mdi_clk()
4029 * hw - Struct containing variables accessed by shared code
4030 * ctrl - Device control register's current value
4033 e1000_lower_mdi_clk(struct e1000_hw *hw, uint32_t * ctrl) in e1000_lower_mdi_clk() argument
4038 E1000_WRITE_REG(hw, CTRL, (*ctrl & ~E1000_CTRL_MDC)); in e1000_lower_mdi_clk()
4046 * hw - Struct containing variables accessed by shared code
4047 * data - Data to send out to the PHY
4048 * count - Number of bits to shift out
4055 uint32_t ctrl; in e1000_shift_out_mdi_bits() local
4063 mask <<= (count - 1); in e1000_shift_out_mdi_bits()
4065 ctrl = E1000_READ_REG(hw, CTRL); in e1000_shift_out_mdi_bits()
4068 ctrl |= (E1000_CTRL_MDIO_DIR | E1000_CTRL_MDC_DIR); in e1000_shift_out_mdi_bits()
4077 ctrl |= E1000_CTRL_MDIO; in e1000_shift_out_mdi_bits()
4079 ctrl &= ~E1000_CTRL_MDIO; in e1000_shift_out_mdi_bits()
4081 E1000_WRITE_REG(hw, CTRL, ctrl); in e1000_shift_out_mdi_bits()
4086 e1000_raise_mdi_clk(hw, &ctrl); in e1000_shift_out_mdi_bits()
4087 e1000_lower_mdi_clk(hw, &ctrl); in e1000_shift_out_mdi_bits()
4096 * hw - Struct containing variables accessed by shared code
4103 uint32_t ctrl; in e1000_shift_in_mdi_bits() local
4114 ctrl = E1000_READ_REG(hw, CTRL); in e1000_shift_in_mdi_bits()
4117 ctrl &= ~E1000_CTRL_MDIO_DIR; in e1000_shift_in_mdi_bits()
4118 ctrl &= ~E1000_CTRL_MDIO; in e1000_shift_in_mdi_bits()
4120 E1000_WRITE_REG(hw, CTRL, ctrl); in e1000_shift_in_mdi_bits()
4127 e1000_raise_mdi_clk(hw, &ctrl); in e1000_shift_in_mdi_bits()
4128 e1000_lower_mdi_clk(hw, &ctrl); in e1000_shift_in_mdi_bits()
4132 e1000_raise_mdi_clk(hw, &ctrl); in e1000_shift_in_mdi_bits()
4133 ctrl = E1000_READ_REG(hw, CTRL); in e1000_shift_in_mdi_bits()
4135 if (ctrl & E1000_CTRL_MDIO) in e1000_shift_in_mdi_bits()
4137 e1000_lower_mdi_clk(hw, &ctrl); in e1000_shift_in_mdi_bits()
4140 e1000_raise_mdi_clk(hw, &ctrl); in e1000_shift_in_mdi_bits()
4141 e1000_lower_mdi_clk(hw, &ctrl); in e1000_shift_in_mdi_bits()
4149 * hw - Struct containing variables accessed by shared code
4150 * reg_addr - address of the PHY register to read
4161 return -E1000_ERR_PARAM; in e1000_read_phy_reg()
4164 if (hw->mac_type > e1000_82543) { in e1000_read_phy_reg()
4165 /* Set up Op-code, Phy Address, and register address in the MDI in e1000_read_phy_reg()
4184 return -E1000_ERR_PHY; in e1000_read_phy_reg()
4188 return -E1000_ERR_PHY; in e1000_read_phy_reg()
4215 * "shift in" the 16-bit value (18 total bits) of the requested PHY in e1000_read_phy_reg()
4226 * hw - Struct containing variables accessed by shared code
4227 * reg_addr - address of the PHY register to write
4228 * data - data to write to the PHY
4239 return -E1000_ERR_PARAM; in e1000_write_phy_reg()
4242 if (hw->mac_type > e1000_82543) { in e1000_write_phy_reg()
4243 /* Set up Op-code, Phy Address, register address, and data intended in e1000_write_phy_reg()
4263 return -E1000_ERR_PHY; in e1000_write_phy_reg()
4294 * hw - Struct containing variables accessed by shared code
4296 * returns: - E1000_BLK_PHY_RESET
4306 if (hw->mac_type == e1000_ich8lan) { in e1000_check_phy_reset_block()
4312 if (hw->mac_type > e1000_82547_rev_2) in e1000_check_phy_reset_block()
4323 * returns: - E1000_ERR_RESET if fail to reset MAC
4335 switch (hw->mac_type) { in e1000_get_phy_cfg_done()
4350 if (hw->mac_type == e1000_igb) { in e1000_get_phy_cfg_done()
4358 timeout--; in e1000_get_phy_cfg_done()
4363 return -E1000_ERR_RESET; in e1000_get_phy_cfg_done()
4372 * Returns the PHY to the power-on reset state
4374 * hw - Struct containing variables accessed by shared code
4380 uint32_t ctrl, ctrl_ext; in e1000_phy_hw_reset() local
4394 if (hw->mac_type > e1000_82543) { in e1000_phy_hw_reset()
4400 return -E1000_ERR_SWFW_SYNC; in e1000_phy_hw_reset()
4406 ctrl = E1000_READ_REG(hw, CTRL); in e1000_phy_hw_reset()
4407 E1000_WRITE_REG(hw, CTRL, ctrl | E1000_CTRL_PHY_RST); in e1000_phy_hw_reset()
4410 if (hw->mac_type < e1000_82571) in e1000_phy_hw_reset()
4415 E1000_WRITE_REG(hw, CTRL, ctrl); in e1000_phy_hw_reset()
4418 if (hw->mac_type >= e1000_82571) in e1000_phy_hw_reset()
4437 if ((hw->mac_type == e1000_82541) || (hw->mac_type == e1000_82547)) { in e1000_phy_hw_reset()
4456 * IGP phy init script - initializes the GbE PHY
4458 * hw - Struct containing variables accessed by shared code
4467 if (hw->phy_init_script) { in e1000_phy_init_script()
4483 switch (hw->mac_type) { in e1000_phy_init_script()
4521 if (hw->mac_type == e1000_82547) { in e1000_phy_init_script()
4538 coarse -= in e1000_phy_init_script()
4540 fine -= IGP01E1000_ANALOG_FUSE_FINE_1; in e1000_phy_init_script()
4543 fine -= IGP01E1000_ANALOG_FUSE_FINE_10; in e1000_phy_init_script()
4565 * hw - Struct containing variables accessed by shared code
4583 switch (hw->phy_type) { in e1000_phy_reset()
4607 if (hw->phy_type == e1000_phy_igp || hw->phy_type == e1000_phy_igp_2) in e1000_phy_reset()
4617 if (hw->mac_type == e1000_undefined) in e1000_set_phy_type()
4618 return -E1000_ERR_PHY_TYPE; in e1000_set_phy_type()
4620 switch (hw->phy_id) { in e1000_set_phy_type()
4625 hw->phy_type = e1000_phy_m88; in e1000_set_phy_type()
4628 if (hw->mac_type == e1000_82541 || in e1000_set_phy_type()
4629 hw->mac_type == e1000_82541_rev_2 || in e1000_set_phy_type()
4630 hw->mac_type == e1000_82547 || in e1000_set_phy_type()
4631 hw->mac_type == e1000_82547_rev_2) { in e1000_set_phy_type()
4632 hw->phy_type = e1000_phy_igp; in e1000_set_phy_type()
4636 hw->phy_type = e1000_phy_igp_3; in e1000_set_phy_type()
4641 hw->phy_type = e1000_phy_ife; in e1000_set_phy_type()
4644 if (hw->mac_type == e1000_80003es2lan) { in e1000_set_phy_type()
4645 hw->phy_type = e1000_phy_gg82563; in e1000_set_phy_type()
4649 hw->phy_type = e1000_phy_bm; in e1000_set_phy_type()
4652 hw->phy_type = e1000_phy_igb; in e1000_set_phy_type()
4657 hw->phy_type = e1000_phy_undefined; in e1000_set_phy_type()
4658 return -E1000_ERR_PHY_TYPE; in e1000_set_phy_type()
4667 * hw - Struct containing variables accessed by shared code
4681 if (hw->mac_type == e1000_82571 || in e1000_detect_gig_phy()
4682 hw->mac_type == e1000_82572) { in e1000_detect_gig_phy()
4683 hw->phy_id = IGP01E1000_I_PHY_ID; in e1000_detect_gig_phy()
4684 hw->phy_type = e1000_phy_igp_2; in e1000_detect_gig_phy()
4688 /* ESB-2 PHY reads require e1000_phy_gg82563 to be set because of a in e1000_detect_gig_phy()
4689 * work- around that forces PHY page 0 to be set or the reads fail. in e1000_detect_gig_phy()
4691 * read the PHY ID. So for ESB-2 we need to have this set so our in e1000_detect_gig_phy()
4694 if (hw->mac_type == e1000_80003es2lan) in e1000_detect_gig_phy()
4695 hw->phy_type = e1000_phy_gg82563; in e1000_detect_gig_phy()
4702 hw->phy_id = (uint32_t) (phy_id_high << 16); in e1000_detect_gig_phy()
4708 hw->phy_id |= (uint32_t) (phy_id_low & PHY_REVISION_MASK); in e1000_detect_gig_phy()
4709 hw->phy_revision = (uint32_t) phy_id_low & ~PHY_REVISION_MASK; in e1000_detect_gig_phy()
4711 switch (hw->mac_type) { in e1000_detect_gig_phy()
4713 if (hw->phy_id == M88E1000_E_PHY_ID) in e1000_detect_gig_phy()
4717 if (hw->phy_id == M88E1000_I_PHY_ID) in e1000_detect_gig_phy()
4725 if (hw->phy_id == M88E1011_I_PHY_ID) in e1000_detect_gig_phy()
4732 if(hw->phy_id == IGP01E1000_I_PHY_ID) in e1000_detect_gig_phy()
4737 if (hw->phy_id == M88E1111_I_PHY_ID) in e1000_detect_gig_phy()
4741 if (hw->phy_id == BME1000_E_PHY_ID) in e1000_detect_gig_phy()
4745 if (hw->phy_id == GG82563_E_PHY_ID) in e1000_detect_gig_phy()
4749 if (hw->phy_id == IGP03E1000_E_PHY_ID) in e1000_detect_gig_phy()
4751 if (hw->phy_id == IFE_E_PHY_ID) in e1000_detect_gig_phy()
4753 if (hw->phy_id == IFE_PLUS_E_PHY_ID) in e1000_detect_gig_phy()
4755 if (hw->phy_id == IFE_C_E_PHY_ID) in e1000_detect_gig_phy()
4759 if (hw->phy_id == I210_I_PHY_ID) in e1000_detect_gig_phy()
4763 DEBUGOUT("Invalid MAC type %d\n", hw->mac_type); in e1000_detect_gig_phy()
4764 return -E1000_ERR_CONFIG; in e1000_detect_gig_phy()
4770 DEBUGOUT("PHY ID 0x%X detected\n", hw->phy_id); in e1000_detect_gig_phy()
4773 DEBUGOUT("Invalid PHY ID 0x%X\n", hw->phy_id); in e1000_detect_gig_phy()
4774 return -E1000_ERR_PHY; in e1000_detect_gig_phy()
4780 * hw - Struct containing variables accessed by shared code
4789 if (hw->mac_type != e1000_82543) { in e1000_set_media_type()
4791 hw->tbi_compatibility_en = false; in e1000_set_media_type()
4794 switch (hw->device_id) { in e1000_set_media_type()
4802 hw->media_type = e1000_media_type_internal_serdes; in e1000_set_media_type()
4805 switch (hw->mac_type) { in e1000_set_media_type()
4808 hw->media_type = e1000_media_type_fiber; in e1000_set_media_type()
4817 hw->media_type = e1000_media_type_copper; in e1000_set_media_type()
4822 hw->media_type = e1000_media_type_fiber; in e1000_set_media_type()
4824 hw->tbi_compatibility_en = false; in e1000_set_media_type()
4826 hw->media_type = e1000_media_type_copper; in e1000_set_media_type()
4834 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
4848 dm_pci_read_config16(hw->pdev, PCI_VENDOR_ID, &hw->vendor_id); in e1000_sw_init()
4849 dm_pci_read_config16(hw->pdev, PCI_DEVICE_ID, &hw->device_id); in e1000_sw_init()
4850 dm_pci_read_config16(hw->pdev, PCI_SUBSYSTEM_VENDOR_ID, in e1000_sw_init()
4851 &hw->subsystem_vendor_id); in e1000_sw_init()
4852 dm_pci_read_config16(hw->pdev, PCI_SUBSYSTEM_ID, &hw->subsystem_id); in e1000_sw_init()
4854 dm_pci_read_config8(hw->pdev, PCI_REVISION_ID, &hw->revision_id); in e1000_sw_init()
4855 dm_pci_read_config16(hw->pdev, PCI_COMMAND, &hw->pci_cmd_word); in e1000_sw_init()
4857 pci_read_config_word(hw->pdev, PCI_VENDOR_ID, &hw->vendor_id); in e1000_sw_init()
4858 pci_read_config_word(hw->pdev, PCI_DEVICE_ID, &hw->device_id); in e1000_sw_init()
4859 pci_read_config_word(hw->pdev, PCI_SUBSYSTEM_VENDOR_ID, in e1000_sw_init()
4860 &hw->subsystem_vendor_id); in e1000_sw_init()
4861 pci_read_config_word(hw->pdev, PCI_SUBSYSTEM_ID, &hw->subsystem_id); in e1000_sw_init()
4863 pci_read_config_byte(hw->pdev, PCI_REVISION_ID, &hw->revision_id); in e1000_sw_init()
4864 pci_read_config_word(hw->pdev, PCI_COMMAND, &hw->pci_cmd_word); in e1000_sw_init()
4874 switch (hw->mac_type) { in e1000_sw_init()
4881 hw->phy_init_script = 1; in e1000_sw_init()
4885 /* flow control settings */ in e1000_sw_init()
4886 hw->fc_high_water = E1000_FC_HIGH_THRESH; in e1000_sw_init()
4887 hw->fc_low_water = E1000_FC_LOW_THRESH; in e1000_sw_init()
4888 hw->fc_pause_time = E1000_FC_PAUSE_TIME; in e1000_sw_init()
4889 hw->fc_send_xon = 1; in e1000_sw_init()
4891 /* Media type - copper or fiber */ in e1000_sw_init()
4892 hw->tbi_compatibility_en = true; in e1000_sw_init()
4895 if (hw->mac_type >= e1000_82543) { in e1000_sw_init()
4900 hw->media_type = e1000_media_type_fiber; in e1000_sw_init()
4903 hw->media_type = e1000_media_type_copper; in e1000_sw_init()
4906 hw->media_type = e1000_media_type_fiber; in e1000_sw_init()
4909 hw->wait_autoneg_complete = true; in e1000_sw_init()
4910 if (hw->mac_type < e1000_82543) in e1000_sw_init()
4911 hw->report_tx_early = 0; in e1000_sw_init()
4913 hw->report_tx_early = 1; in e1000_sw_init()
4928 rd->buffer_addr = cpu_to_le64((unsigned long)packet); in fill_rx()
4938 flush_start = ((unsigned long)rd) & ~(ARCH_DMA_MINALIGN - 1); in fill_rx()
4946 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
4970 if (hw->mac_type <= e1000_82547_rev_2 && in e1000_configure_tx()
4971 (hw->media_type == e1000_media_type_fiber || in e1000_configure_tx()
4972 hw->media_type == e1000_media_type_internal_serdes)) in e1000_configure_tx()
4978 switch (hw->mac_type) { in e1000_configure_tx()
5003 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) { in e1000_configure_tx()
5008 } else if (hw->mac_type == e1000_80003es2lan) { in e1000_configure_tx()
5020 hw->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS; in e1000_configure_tx()
5023 if (hw->mac_type < e1000_82543) in e1000_configure_tx()
5024 hw->txd_cmd |= E1000_TXD_CMD_RPS; in e1000_configure_tx()
5026 hw->txd_cmd |= E1000_TXD_CMD_RS; in e1000_configure_tx()
5029 if (hw->mac_type == e1000_igb) { in e1000_configure_tx()
5046 * e1000_setup_rctl - configure the receive control register
5062 if (hw->tbi_compatibility_on == 1) in e1000_setup_rctl()
5074 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
5088 if (hw->mac_type >= e1000_82540) { in e1000_configure_rx()
5096 if (hw->mac_type >= e1000_82571) { in e1000_configure_rx()
5114 if (hw->mac_type == e1000_igb) { in e1000_configure_rx()
5128 POLL - Wait for a frame
5140 /* Re-load the descriptor from RAM. */ in _e1000_poll()
5141 inval_start = ((unsigned long)rd) & ~(ARCH_DMA_MINALIGN - 1); in _e1000_poll()
5145 if (!(rd->status & E1000_RXD_STAT_DD)) in _e1000_poll()
5147 /* DEBUGOUT("recv: packet len=%d\n", rd->length); */ in _e1000_poll()
5148 /* Packet received, make sure the data are re-loaded from RAM. */ in _e1000_poll()
5149 len = le16_to_cpu(rd->length); in _e1000_poll()
5166 txp->buffer_addr = cpu_to_le64(virt_to_bus(hw->pdev, nv_packet)); in _e1000_transmit()
5167 txp->lower.data = cpu_to_le32(hw->txd_cmd | length); in _e1000_transmit()
5168 txp->upper.data = 0; in _e1000_transmit()
5175 flush_start = ((unsigned long)txp) & ~(ARCH_DMA_MINALIGN - 1); in _e1000_transmit()
5184 if (le32_to_cpu(txp->upper.data) & E1000_TXD_STAT_DD) in _e1000_transmit()
5218 if (hw->mac_type >= e1000_82544) in e1000_reset()
5231 if ((ret_val == -E1000_ERR_NOLINK) || in _e1000_init()
5232 (ret_val == -E1000_ERR_TIMEOUT)) { in _e1000_init()
5248 * hw - Struct containing variables accessed by shared code
5254 switch (hw->mac_type) { in e1000_get_bus_type()
5257 hw->bus_type = e1000_bus_type_pci; in e1000_get_bus_type()
5266 hw->bus_type = e1000_bus_type_pci_express; in e1000_get_bus_type()
5270 hw->bus_type = (status & E1000_STATUS_PCIX_MODE) ? in e1000_get_bus_type()
5291 /* Assign the passed-in values */ in e1000_init_one()
5293 hw->pdev = devno; in e1000_init_one()
5295 hw->pdev = devno; in e1000_init_one()
5297 hw->cardnum = cardnum; in e1000_init_one()
5307 /* Try to enable I/O accesses and bus-mastering */ in e1000_init_one()
5323 return -ENOSPC; in e1000_init_one()
5326 E1000_ERR(hw, "Can't enable bus-mastering\n"); in e1000_init_one()
5327 return -EPERM; in e1000_init_one()
5331 hw->fc = e1000_fc_default; in e1000_init_one()
5332 hw->original_fc = e1000_fc_default; in e1000_init_one()
5333 hw->autoneg_failed = 0; in e1000_init_one()
5334 hw->autoneg = 1; in e1000_init_one()
5335 hw->get_link_status = true; in e1000_init_one()
5337 hw->eeprom_semaphore_present = true; in e1000_init_one()
5340 hw->hw_addr = dm_pci_map_bar(devno, PCI_BASE_ADDRESS_0, in e1000_init_one()
5343 hw->hw_addr = pci_map_bar(devno, PCI_BASE_ADDRESS_0, in e1000_init_one()
5346 hw->mac_type = e1000_undefined; in e1000_init_one()
5351 return -EIO; in e1000_init_one()
5363 return -EINVAL; in e1000_init_one()
5367 return -ENXIO; in e1000_init_one()
5392 TRANSMIT - Transmit a frame
5396 struct e1000_hw *hw = nic->priv; in e1000_transmit()
5402 DISABLE - Turn off ethernet interface
5407 struct e1000_hw *hw = nic->priv; in e1000_disable()
5413 INIT - set up ethernet interface(s)
5418 struct e1000_hw *hw = nic->priv; in e1000_init()
5420 return _e1000_init(hw, nic->enetaddr); in e1000_init()
5426 struct e1000_hw *hw = nic->priv; in e1000_poll()
5439 PROBE - Look for an adapter, this routine's visible to the outside
5440 You should omit the last argument struct pci_device * for a non-PCI NIC
5455 * perform SPI EEPROM programming from U-Boot, for example. in e1000_initialize()
5469 nic->priv = hw; in e1000_initialize()
5472 e1000_name(nic->name, i); in e1000_initialize()
5473 hw->name = nic->name; in e1000_initialize()
5475 ret = e1000_init_one(hw, i, devno, nic->enetaddr); in e1000_initialize()
5478 list_add_tail(&hw->list_node, &e1000_hw_list); in e1000_initialize()
5480 hw->nic = nic; in e1000_initialize()
5483 nic->init = e1000_init; in e1000_initialize()
5484 nic->recv = e1000_poll; in e1000_initialize()
5485 nic->send = e1000_transmit; in e1000_initialize()
5486 nic->halt = e1000_disable; in e1000_initialize()
5498 if (hw->cardnum == cardnum) in e1000_find_card()
5533 mac = plat->enetaddr; in do_e1000()
5538 mac = hw->nic->enetaddr; in do_e1000()
5545 if (!strcmp(argv[2], "print-mac-address")) { in do_e1000()
5557 return do_e1000_spi(cmdtp, hw, argc - 3, argv + 3); in do_e1000()
5567 /* */"<card#> print-mac-address\n"
5574 " - Manage the Intel E1000 PCI device"
5584 return _e1000_init(hw, plat->enetaddr); in e1000_eth_start()
5601 return ret ? 0 : -ETIMEDOUT; in e1000_eth_send()
5613 return len ? len : -EAGAIN; in e1000_eth_recv()
5631 hw->name = dev->name; in e1000_eth_probe()
5632 ret = e1000_init_one(hw, trailing_strtol(dev->name), in e1000_eth_probe()
5633 dev, plat->enetaddr); in e1000_eth_probe()