Lines Matching refs:GMAC0_REG_BASE
16 #define GMAC0_REG_BASE 0x18042000 macro
17 #define GMAC0_DEV_CTRL_ADDR GMAC0_REG_BASE
18 #define GMAC0_INT_STATUS_ADDR (GMAC0_REG_BASE + 0x020)
19 #define GMAC0_INTR_RECV_LAZY_ADDR (GMAC0_REG_BASE + 0x100)
20 #define GMAC0_PHY_CTRL_ADDR (GMAC0_REG_BASE + 0x188)
29 #define GMAC0_DMA_TX_CTRL_ADDR (GMAC0_REG_BASE + 0x200)
41 #define GMAC0_DMA_RX_CTRL_ADDR (GMAC0_REG_BASE + 0x220)
53 #define UNIMAC0_CMD_CFG_ADDR (GMAC0_REG_BASE + 0x808)
54 #define UNIMAC0_MAC_MSB_ADDR (GMAC0_REG_BASE + 0x80c)
55 #define UNIMAC0_MAC_LSB_ADDR (GMAC0_REG_BASE + 0x810)
56 #define UNIMAC0_FRM_LENGTH_ADDR (GMAC0_REG_BASE + 0x814)