Lines Matching +full:rx +full:- +full:ctrl
2 * Copyright 2014-2017 Broadcom.
4 * SPDX-License-Identifier: GPL-2.0+
20 #include "bcm-sf2-eth.h"
21 #include "bcm-sf2-eth-gmac.h"
27 countdown -= 10; \
112 descp = (dma64dd_t *)(dma->tx_desc_aligned) + i; in dma_tx_dump()
114 descp->ctrl1, descp->ctrl2, in dma_tx_dump()
115 descp->addrhigh, descp->addrlow); in dma_tx_dump()
121 bufp = (uint8_t *)(dma->tx_buf + i * TX_BUF_SIZE_ALIGNED); in dma_tx_dump()
133 printf("RX DMA Register:\n"); in dma_rx_dump()
142 printf("RX Descriptors:\n"); in dma_rx_dump()
144 descp = (dma64dd_t *)(dma->rx_desc_aligned) + i; in dma_rx_dump()
146 descp->ctrl1, descp->ctrl2, in dma_rx_dump()
147 descp->addrhigh, descp->addrlow); in dma_rx_dump()
150 printf("RX Buffers:\n"); in dma_rx_dump()
152 bufp = dma->rx_buf + i * RX_BUF_SIZE_ALIGNED; in dma_rx_dump()
164 uint32_t ctrl; in dma_tx_init() local
169 memset((void *)(dma->tx_desc_aligned), 0, in dma_tx_init()
171 memset(dma->tx_buf, 0, TX_BUF_NUM * TX_BUF_SIZE_ALIGNED); in dma_tx_init()
175 descp = (dma64dd_t *)(dma->tx_desc_aligned) + i; in dma_tx_init()
176 bufp = dma->tx_buf + i * TX_BUF_SIZE_ALIGNED; in dma_tx_init()
180 ctrl = 0; in dma_tx_init()
182 if (i == (TX_BUF_NUM-1)) in dma_tx_init()
183 ctrl = D64_CTRL1_EOT; in dma_tx_init()
184 descp->ctrl1 = ctrl; in dma_tx_init()
185 descp->ctrl2 = 0; in dma_tx_init()
186 descp->addrlow = (uint32_t)bufp; in dma_tx_init()
187 descp->addrhigh = 0; in dma_tx_init()
191 descp = dma->tx_desc_aligned; in dma_tx_init()
192 bufp = dma->tx_buf; in dma_tx_init()
201 writel((uint32_t)(dma->tx_desc_aligned), GMAC0_DMA_TX_ADDR_LOW_ADDR); in dma_tx_init()
205 writel(((uint32_t)(dma->tx_desc_aligned)) & D64_XP_LD_MASK, in dma_tx_init()
216 uint32_t ctrl; in dma_rx_init() local
222 memset((void *)(dma->rx_desc_aligned), 0, in dma_rx_init()
225 memset(dma->rx_buf, 0, RX_BUF_NUM * RX_BUF_SIZE_ALIGNED); in dma_rx_init()
227 /* Initialize RX DMA descriptor table */ in dma_rx_init()
229 descp = (dma64dd_t *)(dma->rx_desc_aligned) + i; in dma_rx_init()
230 bufp = dma->rx_buf + i * RX_BUF_SIZE_ALIGNED; in dma_rx_init()
231 ctrl = 0; in dma_rx_init()
233 if (i == (RX_BUF_NUM - 1)) in dma_rx_init()
234 ctrl = D64_CTRL1_EOT; in dma_rx_init()
235 descp->ctrl1 = ctrl; in dma_rx_init()
236 descp->ctrl2 = RX_BUF_SIZE_ALIGNED; in dma_rx_init()
237 descp->addrlow = (uint32_t)bufp; in dma_rx_init()
238 descp->addrhigh = 0; in dma_rx_init()
244 descp = dma->rx_desc_aligned; in dma_rx_init()
245 bufp = dma->rx_buf; in dma_rx_init()
270 * Rx Overflow Continue and Parity are DISABLED. in dma_init()
274 debug("rx burst len 0x%x\n", in dma_init()
299 free(dma->tx_buf); in dma_deinit()
300 dma->tx_buf = NULL; in dma_deinit()
301 free(dma->tx_desc_aligned); in dma_deinit()
302 dma->tx_desc_aligned = NULL; in dma_deinit()
304 free(dma->rx_buf); in dma_deinit()
305 dma->rx_buf = NULL; in dma_deinit()
306 free(dma->rx_desc_aligned); in dma_deinit()
307 dma->rx_desc_aligned = NULL; in dma_deinit()
314 uint8_t *bufp = dma->tx_buf + dma->cur_tx_index * TX_BUF_SIZE_ALIGNED; in gmac_tx_packet()
318 int txout = dma->cur_tx_index; in gmac_tx_packet()
321 uint32_t ctrl; in gmac_tx_packet() local
322 uint32_t last_desc = (((uint32_t)dma->tx_desc_aligned) + in gmac_tx_packet()
334 ctrl = (buflen & D64_CTRL2_BC_MASK); in gmac_tx_packet()
342 if (txout == (TX_BUF_NUM - 1)) { in gmac_tx_packet()
344 last_desc = ((uint32_t)(dma->tx_desc_aligned)) & D64_XP_LD_MASK; in gmac_tx_packet()
348 descp = ((dma64dd_t *)(dma->tx_desc_aligned)) + txout; in gmac_tx_packet()
349 descp->addrlow = (uint32_t)bufp; in gmac_tx_packet()
350 descp->addrhigh = 0; in gmac_tx_packet()
351 descp->ctrl1 = flags; in gmac_tx_packet()
352 descp->ctrl2 = ctrl; in gmac_tx_packet()
355 flush_dcache_range((unsigned long)dma->tx_desc_aligned, in gmac_tx_packet()
356 (unsigned long)dma->tx_desc_aligned + in gmac_tx_packet()
367 dma->cur_tx_index = (txout + 1) & (TX_BUF_NUM - 1); in gmac_tx_packet()
416 index = dma->cur_rx_index; in gmac_check_rx_done()
417 offset = (uint32_t)(dma->rx_desc_aligned); in gmac_check_rx_done()
420 curr = ((stat0 - offset) & D64_RS0_CD_MASK) / sizeof(dma64dd_t); in gmac_check_rx_done()
421 active = ((stat1 - offset) & D64_RS0_CD_MASK) / sizeof(dma64dd_t); in gmac_check_rx_done()
425 return -1; in gmac_check_rx_done()
433 /* get the packet pointer that corresponds to the rx descriptor */ in gmac_check_rx_done()
434 bufp = dma->rx_buf + index * RX_BUF_SIZE_ALIGNED; in gmac_check_rx_done()
436 descp = (dma64dd_t *)(dma->rx_desc_aligned) + index; in gmac_check_rx_done()
438 flush_dcache_range((unsigned long)dma->rx_desc_aligned, in gmac_check_rx_done()
439 (unsigned long)dma->rx_desc_aligned + in gmac_check_rx_done()
444 buflen = (descp->ctrl2 & D64_CTRL2_BC_MASK); in gmac_check_rx_done()
452 dma->cur_rx_index = (index + 1) & (RX_BUF_NUM - 1); in gmac_check_rx_done()
460 /* copy status into temp buf then copy data from rx buffer */ in gmac_check_rx_done()
466 descp->ctrl2 = RX_BUF_SIZE_ALIGNED; in gmac_check_rx_done()
467 descp->addrlow = (uint32_t)bufp; in gmac_check_rx_done()
468 descp->addrhigh = 0; in gmac_check_rx_done()
470 flush_dcache_range((unsigned long)dma->rx_desc_aligned, in gmac_check_rx_done()
471 (unsigned long)dma->rx_desc_aligned + in gmac_check_rx_done()
474 /* set the lastdscr for the rx ring */ in gmac_check_rx_done()
532 dma->cur_tx_index = 0; in gmac_enable_dma()
549 writel((uint32_t)(dma->tx_desc_aligned), in gmac_enable_dma()
553 dma->cur_rx_index = 0; in gmac_enable_dma()
571 /* Keep default Rx burstlen */ in gmac_enable_dma()
578 * the rx descriptor ring should have in gmac_enable_dma()
580 * set the lastdscr for the rx ring in gmac_enable_dma()
582 writel(((uint32_t)(dma->rx_desc_aligned) + in gmac_enable_dma()
583 (RX_BUF_NUM - 1) * RX_BUF_SIZE_ALIGNED) & in gmac_enable_dma()
598 timeout -= 10; in gmac_mii_busywait()
614 return -1; in gmac_miiphy_read()
626 return -1; in gmac_miiphy_read()
642 return -1; in gmac_miiphy_write()
655 return -1; in gmac_miiphy_write()
746 return -1; in gmac_set_speed()
773 struct eth_info *eth = (struct eth_info *)(dev->priv); in gmac_mac_init()
774 struct eth_dma *dma = &(eth->dma); in gmac_mac_init()
798 * set eth_data into loopback mode to ensure no rx traffic in gmac_mac_init()
847 /* select MDC/MDIO connecting to on-chip internal PHYs */ in gmac_mac_init()
863 /* enable one rx interrupt per received frame */ in gmac_mac_init()
893 return -1; in gmac_mac_init()
898 struct eth_info *eth = (struct eth_info *)(dev->priv); in gmac_add()
899 struct eth_dma *dma = &(eth->dma); in gmac_add()
903 * Desc has to be 16-byte aligned. But for dcache flush it must be in gmac_add()
909 return -1; in gmac_add()
912 dma->tx_desc_aligned = (void *)tmp; in gmac_add()
914 dma->tx_desc_aligned, DESCP_SIZE_ALIGNED * TX_BUF_NUM); in gmac_add()
919 free(dma->tx_desc_aligned); in gmac_add()
920 return -1; in gmac_add()
922 dma->tx_buf = (uint8_t *)tmp; in gmac_add()
924 dma->tx_buf, TX_BUF_SIZE_ALIGNED * TX_BUF_NUM); in gmac_add()
926 /* Desc has to be 16-byte aligned */ in gmac_add()
929 printf("%s: Failed to allocate RX Descriptor\n", __func__); in gmac_add()
930 free(dma->tx_desc_aligned); in gmac_add()
931 free(dma->tx_buf); in gmac_add()
932 return -1; in gmac_add()
934 dma->rx_desc_aligned = (void *)tmp; in gmac_add()
935 debug("RX Descriptor Buffer: %p, length: 0x%x\n", in gmac_add()
936 dma->rx_desc_aligned, DESCP_SIZE_ALIGNED * RX_BUF_NUM); in gmac_add()
940 printf("%s: Failed to allocate RX Data Buffer\n", __func__); in gmac_add()
941 free(dma->tx_desc_aligned); in gmac_add()
942 free(dma->tx_buf); in gmac_add()
943 free(dma->rx_desc_aligned); in gmac_add()
944 return -1; in gmac_add()
946 dma->rx_buf = (uint8_t *)tmp; in gmac_add()
947 debug("RX Data Buffer: %p; length: 0x%x\n", in gmac_add()
948 dma->rx_buf, RX_BUF_SIZE_ALIGNED * RX_BUF_NUM); in gmac_add()
952 eth->phy_interface = PHY_INTERFACE_MODE_GMII; in gmac_add()
954 dma->tx_packet = gmac_tx_packet; in gmac_add()
955 dma->check_tx_done = gmac_check_tx_done; in gmac_add()
957 dma->check_rx_done = gmac_check_rx_done; in gmac_add()
959 dma->enable_dma = gmac_enable_dma; in gmac_add()
960 dma->disable_dma = gmac_disable_dma; in gmac_add()
962 eth->miiphy_read = gmac_miiphy_read; in gmac_add()
963 eth->miiphy_write = gmac_miiphy_write; in gmac_add()
965 eth->mac_init = gmac_mac_init; in gmac_add()
966 eth->disable_mac = gmac_disable; in gmac_add()
967 eth->enable_mac = gmac_enable; in gmac_add()
968 eth->set_mac_addr = gmac_set_mac_addr; in gmac_add()
969 eth->set_mac_speed = gmac_set_speed; in gmac_add()