drivers/net/8390.h

47 #define EI_SHIFT(x)	(x)  macro
49 #define E8390_CMD	EI_SHIFT(0x00)  /* The command register (for all pages) */
51 #define EN0_CLDALO	EI_SHIFT(0x01)	/* Low byte of current local dma addr  RD */
52 #define EN0_STARTPG	EI_SHIFT(0x01)	/* Starting page of ring bfr WR */
53 #define EN0_CLDAHI	EI_SHIFT(0x02)	/* High byte of current local dma addr  RD */
54 #define EN0_STOPPG	EI_SHIFT(0x02)	/* Ending page +1 of ring bfr WR */
55 #define EN0_BOUNDARY	EI_SHIFT(0x03)	/* Boundary page of ring bfr RD WR */
56 #define EN0_TSR		EI_SHIFT(0x04)	/* Transmit status reg RD */
57 #define EN0_TPSR	EI_SHIFT(0x04)	/* Transmit starting page WR */
58 #define EN0_NCR		EI_SHIFT(0x05)	/* Number of collision reg RD */
59 #define EN0_TCNTLO	EI_SHIFT(0x05)	/* Low  byte of tx byte count WR */
60 #define EN0_FIFO	EI_SHIFT(0x06)	/* FIFO RD */
61 #define EN0_TCNTHI	EI_SHIFT(0x06)	/* High byte of tx byte count WR */
62 #define EN0_ISR		EI_SHIFT(0x07)	/* Interrupt status reg RD WR */
63 #define EN0_CRDALO	EI_SHIFT(0x08)	/* low byte of current remote dma address RD */
64 #define EN0_RSARLO	EI_SHIFT(0x08)	/* Remote start address reg 0 */
65 #define EN0_CRDAHI	EI_SHIFT(0x09)	/* high byte, current remote dma address RD */
66 #define EN0_RSARHI	EI_SHIFT(0x09)	/* Remote start address reg 1 */
67 #define EN0_RCNTLO	EI_SHIFT(0x0a)	/* Remote byte count reg WR */
68 #define EN0_RCNTHI	EI_SHIFT(0x0b)	/* Remote byte count reg WR */
69 #define EN0_RSR		EI_SHIFT(0x0c)	/* rx status reg RD */
70 #define EN0_RXCR	EI_SHIFT(0x0c)	/* RX configuration reg WR */
71 #define EN0_TXCR	EI_SHIFT(0x0d)	/* TX configuration reg WR */
72 #define EN0_COUNTER0	EI_SHIFT(0x0d)	/* Rcv alignment error counter RD */
73 #define EN0_DCFG	EI_SHIFT(0x0e)	/* Data configuration reg WR */
74 #define EN0_COUNTER1	EI_SHIFT(0x0e)	/* Rcv CRC error counter RD */
75 #define EN0_IMR		EI_SHIFT(0x0f)	/* Interrupt mask reg WR */
76 #define EN0_COUNTER2	EI_SHIFT(0x0f)	/* Rcv missed frame error counter RD */
96 #define EN1_PHYS   EI_SHIFT(0x01)	/* This board's physical enet addr RD WR */
97 #define EN1_PHYS_SHIFT(i)  EI_SHIFT(i+1) /* Get and set mac address */
98 #define EN1_CURPAG EI_SHIFT(0x07)	/* Current memory page RD WR */
99 #define EN1_MULT   EI_SHIFT(0x08)	/* Multicast filter mask array (8 bytes) RD WR */
100 #define EN1_MULT_SHIFT(i)  EI_SHIFT(8+i) /* Get and set multicast filter */