1 // SPDX-License-Identifier: GPL-2.0
6  *	Dingqiang Lin <jon.lin@rock-chips.com>
35 		return -ERANGE;  in xt26g0xa_ooblayout_ecc()
37 	region->offset = 48;  in xt26g0xa_ooblayout_ecc()
38 	region->length = 16;  in xt26g0xa_ooblayout_ecc()
47 		return -ERANGE;  in xt26g0xa_ooblayout_free()
49 	region->offset = 2;  in xt26g0xa_ooblayout_free()
50 	region->length = mtd->oobsize - 18;  in xt26g0xa_ooblayout_free()
63 	return -ERANGE;  in xt26g01b_ooblayout_ecc()
70 		return -ERANGE;  in xt26g01b_ooblayout_free()
72 	region->offset = 2;  in xt26g01b_ooblayout_free()
73 	region->length = mtd->oobsize - 2;  in xt26g01b_ooblayout_free()
87 		return -ERANGE;  in xt26g02b_ooblayout_ecc()
89 	region->offset = (16 * section) + 8;  in xt26g02b_ooblayout_ecc()
90 	region->length = 8;  in xt26g02b_ooblayout_ecc()
99 		return -ERANGE;  in xt26g02b_ooblayout_free()
101 	region->offset = (16 * section) + 2;  in xt26g02b_ooblayout_free()
102 	region->length = 6;  in xt26g02b_ooblayout_free()
116 		return -ERANGE;  in xt26g01c_ooblayout_ecc()
118 	region->offset = mtd->oobsize / 2;  in xt26g01c_ooblayout_ecc()
119 	region->length = mtd->oobsize / 2;  in xt26g01c_ooblayout_ecc()
128 		return -ERANGE;  in xt26g01c_ooblayout_free()
130 	region->offset = 2;  in xt26g01c_ooblayout_free()
131 	region->length = mtd->oobsize / 2 - 2;  in xt26g01c_ooblayout_free()
143  * [0x0000], No bit errors were detected;
144  * [0x0001, 0x0111], Bit errors were detected and corrected. Not
146  * [0x1000], Multiple bit errors were detected and
148  * [0x1100], Bit error count equals the bit flip
162 		return -EBADMSG;  in xt26g0xa_ecc_get_status()
167  * [0x0], No bit errors were detected;
168  * [0x001, 0x011], Bit errors were detected and corrected. Not
170  * [0x100], Bit error count equals the bit flip
173  * [0x111], Multiple bit errors were detected and
184 		return -EBADMSG;  in xt26g02b_ecc_get_status()
189  * [0b0000], No bit errors were detected;
190  * [0b0001, 0b0111], 1-7 Bit errors were detected and corrected. Not
192  * [0b1000], 8 Bit errors were detected and corrected. Bit error count
193  *	equals the bit flip detectionthreshold;
194  * [0b1111], Bit errors greater than ECC capability(8 bits) and not corrected;
205 		return -EBADMSG;  in xt26g01c_ecc_get_status()
211 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
221 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
231 		     NAND_MEMORG(1, 2048, 64, 128, 2048, 1, 1, 1),
241 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
251 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
261 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
271 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
281 		     NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
291 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),