Lines Matching +full:nand +full:- +full:controller
2 menuconfig NAND config
3 bool "Raw NAND Device Support"
4 if NAND
9 This option, if enabled, provides more flexible and linux-like
10 NAND initialization process.
19 bool "Support Atmel NAND controller"
22 Enable this driver for NAND flash platforms using an Atmel NAND
23 controller.
36 The Programmable Multibit ECC (PMECC) controller is a programmable
64 bool "Support Broadcom NAND controller"
67 Enable the driver for NAND flash on platforms using a Broadcom NAND
68 controller.
71 bool "Support Broadcom NAND controller on bcm6838"
74 Enable support for broadcom nand driver on bcm6838.
77 bool "Support Broadcom NAND controller on bcm6858"
80 Enable support for broadcom nand driver on bcm6858.
83 bool "Support Broadcom NAND controller on bcm63158"
86 Enable support for broadcom nand driver on bcm63158.
89 bool "Support TI Davinci NAND controller"
91 Enable this driver for NAND flash controllers available in TI Davinci
100 bool "Support Denali NAND controller as a DT device"
104 Enable the driver for NAND flash on platforms using a Denali NAND
105 controller as a DT device.
117 bool "Support LPC32XX_SLC controller"
119 Enable the LPC32XX SLC NAND controller.
122 bool "Support OMAP GPMC NAND controller"
126 GPMC controller is used for parallel NAND flash devices, and can
135 On OMAP platforms that use the GPMC controller
143 ELM controller is used for ECC error detection (not ECC calculation)
145 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
148 done by GPMC controller.
156 Enables support for NAND Flash Controller on some Freescale
164 bool "Support Vybrid's vf610 NAND controller as a DT device"
167 Enable the driver for Vybrid's vf610 NAND flash on platforms
178 bool "24-error correction (45 ECC bytes)"
181 bool "32-error correction (60 ECC bytes)"
188 bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
192 This enables the driver for the NAND flash device found on
196 bool "Support for NAND on Allwinner SoCs"
203 ---help---
204 Enable support for NAND. This option enables the standard and
206 The SPL driver only supports reading from the NAND using DMA
212 int "Allwinner NAND SPL ECC Strength"
216 int "Allwinner NAND SPL ECC Step Size"
220 int "Allwinner NAND SPL Usable Page Size"
226 bool "Configure Arasan Nand"
230 This enables Nand driver support for Arasan nand flash
231 controller. This uses the hardware ECC for read and
235 bool "MXC NAND support"
239 This enables the NAND driver for the NAND flash controller on the
243 bool "MXS NAND support"
251 This enables NAND driver for the NAND flash controller on the
257 bool "Support MXS NAND controller as a DT device"
260 Enable the driver for MXS NAND flash on platforms using
264 bool "Use minimum ECC strength supported by the controller"
270 bool "Support for NAND on Rockchip SoCs"
274 Enable support for Rockchip nand.
277 bool "Support for NAND V9 on Rockchip SoCs"
281 Enable support for Rockchip nand v9.
285 bool "Support Rockchip NAND controller as a DT device"
288 Enable the driver for Rockchip NAND flash on platforms
293 bool "Support for Zynq Nand controller"
297 This enables Nand driver support for Nand flash controller
301 bool "Enable use of 1st stage bootloader timing for NAND"
304 This flag prevent U-boot reconfigure NAND flash controller and reuse
305 the NAND timing from 1st stage bootloader.
308 bool "Support for NAND controller on STM32MP SoCs"
313 Enables support for NAND Flash chips on SoCs containing the FMC2
314 NAND controller. This controller is found on STM32MP SoCs.
315 The controller supports a maximum 8k page size and supports
316 a maximum 8-bit correction error per sector of 512 bytes.
318 comment "Generic NAND options"
321 hex "NAND chip eraseblock size"
324 Number of data bytes in one eraseblock for the NAND chip on the
329 hex "NAND chip page size"
332 Number of data bytes in one page for the NAND chip on the
336 hex "NAND chip OOB size"
339 Number of bytes in the Out-Of-Band area for the NAND chip on
345 bool "Use 16-bit NAND interface"
348 Indicates that NAND device has 16-bit wide data-bus. In absence of this
349 config, bus-width of NAND device is assumed to be either 8-bit and later
351 Above config is useful when NAND device's bus-width information cannot
352 be determined from on-chip ONFI params, like in following scenarios:
353 - SPL boot does not support reading of ONFI parameters. This is done to
354 keep SPL code foot-print small.
355 - In current U-Boot flow using nand_init(), driver initialization
358 not available while configuring controller. So a static CONFIG_NAND_xx
359 is needed to know the device's bus-width in advance.
362 int "NAND max chips"
366 The maximum number of NAND chips per device to be supported.
371 bool "Define U-boot binaries locations in NAND"
374 This option should not be enabled when compiling U-boot for boards
379 hex "Location in NAND to read U-Boot from"
383 Set the offset from the start of the nand where u-boot should be
387 hex "Location in NAND to read U-Boot from"
391 Set the offset from the start of the nand where the redundant u-boot
395 bool "Enables SPL-NAND driver which supports ELM based"
400 hardware engine and use NAND boot mode.
401 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
403 SPL-NAND driver with software ECC correction support.
406 bool "Support Denali NAND controller for SPL"
408 This is a small implementation of the Denali NAND controller
412 bool "Use simple SPL NAND driver"
415 Support for NAND boot using simple NAND drivers that
419 endif # if NAND