Lines Matching +full:ecc +full:- +full:engine

9 	  This option, if enabled, provides more flexible and linux-like
15 	  Omit standard ECC layouts to safe space. Select this if your driver
16 	  is known to provide its own ECC layout.
28 	bool "Atmel Hardware ECC"
32 	bool "Atmel Programmable Multibit ECC (PMECC)"
36 	  The Programmable Multibit ECC (PMECC) controller is a programmable
40 	int "PMECC Correctable ECC Bits"
44 	  Correctable ECC bits, can be 2, 4, 8, 12, and 24.
59 	  Generate Programmable Multibit ECC (PMECC) header for SPL image.
113 	  of OOB area before last ECC sector data starts.  This is potentially
127 	  do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8
128 	  and BCH16 ECC algorithms.
143 	  ELM controller is used for ECC error detection (not ECC calculation)
144 	  of BCH4, BCH8 and BCH16 ECC algorithms.
145 	  Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
146 	  thus such SoC platforms need to depend on software library for ECC error
147 	  detection. However ECC calculation on such plaforms would still be
159 	  currently does not support hardware ECC.
171 	prompt "Hardware ECC strength"
175 	  Select the ECC strength used in the hardware BCH ECC block.
178 	bool "24-error correction (45 ECC bytes)"
181 	bool "32-error correction (60 ECC bytes)"
203 	---help---
212 	int "Allwinner NAND SPL ECC Strength"
216 	int "Allwinner NAND SPL ECC Step Size"
231 	  controller. This uses the hardware ECC for read and
264 	bool "Use minimum ECC strength supported by the controller"
304 	  This flag prevent U-boot reconfigure NAND flash controller and reuse
316 	  a maximum 8-bit correction error per sector of 512 bytes.
339 	  Number of bytes in the Out-Of-Band area for the NAND chip on
345 	bool "Use 16-bit NAND interface"
348 	  Indicates that NAND device has 16-bit wide data-bus. In absence of this
349 	  config, bus-width of NAND device is assumed to be either 8-bit and later
351 	  Above config is useful when NAND device's bus-width information cannot
352 	  be determined from on-chip ONFI params, like in following scenarios:
353 	  - SPL boot does not support reading of ONFI parameters. This is done to
354 	    keep SPL code foot-print small.
355 	  - In current U-Boot flow using nand_init(), driver initialization
359 	    is needed to know the device's bus-width in advance.
371 	bool "Define U-boot binaries locations in NAND"
374 	This option should not be enabled when compiling U-boot for boards
379 	hex "Location in NAND to read U-Boot from"
383 	Set the offset from the start of the nand where u-boot should be
387 	hex "Location in NAND to read U-Boot from"
391 	Set the offset from the start of the nand where the redundant u-boot
395 	bool "Enables SPL-NAND driver which supports ELM based"
399 	  Hardware ECC correction. This is useful for platforms which have ELM
400 	  hardware engine and use NAND boot mode.
401 	  Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
403           SPL-NAND driver with software ECC correction support.