Lines Matching +full:0 +full:x02000

24 #define AM29DL800BB	0x22CB
25 #define AM29DL800BT 0x224A
27 #define AM29F400BB 0x22AB
28 #define AM29F800BB 0x2258
29 #define AM29F800BT 0x22D6
30 #define AM29LV400BB 0x22BA
31 #define AM29LV400BT 0x22B9
32 #define AM29LV800BB 0x225B
33 #define AM29LV800BT 0x22DA
34 #define AM29LV160DT 0x22C4
35 #define AM29LV160DB 0x2249
36 #define AM29F017D 0x003D
37 #define AM29F016D 0x00AD
38 #define AM29F080 0x00D5
39 #define AM29F040 0x00A4
40 #define AM29LV040B 0x004F
41 #define AM29F032B 0x0041
42 #define AM29F002T 0x00B0
45 #define SST39LF800 0x2781
46 #define SST39LF160 0x2782
47 #define SST39VF1601 0x234b
48 #define SST39LF512 0x00D4
49 #define SST39LF010 0x00D5
50 #define SST39LF020 0x00D6
51 #define SST39LF040 0x00D7
52 #define SST39SF010A 0x00B5
53 #define SST39SF020A 0x00B6
56 #define STM29F400BB 0x00D6
59 #define MX29LV040 0x004F
62 #define W39L040A 0x00D6
65 #define A29L040 0x0092
68 #define EN29LV040A 0x004F
75 * MTD_UADDR_NOT_SUPPORTED must be 0 so that structure
80 MTD_UADDR_NOT_SUPPORTED = 0, /* data width not supported */
100 * initializers have extra fields initialized to 0. It is _very_
103 * MTD_UADDR_NOT_SUPPORTED must be 0 and the first entry here
108 .addr1 = 0xffff,
109 .addr2 = 0xffff
113 .addr1 = 0x0555,
114 .addr2 = 0x02aa
118 .addr1 = 0x0555,
119 .addr2 = 0x0aaa
123 .addr1 = 0x5555,
124 .addr2 = 0x2aaa
128 .addr1 = 0x0AAA,
129 .addr2 = 0x0555
133 .addr1 = 0x0000, /* Doesn't matter which address */
134 .addr2 = 0x0000 /* is used - must be last entry */
138 .addr1 = 0x0000,
139 .addr2 = 0x0000
173 [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
179 ERASEINFO(0x01000,64),
189 [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
195 ERASEINFO(0x10000,8),
203 [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
209 ERASEINFO(0x01000,128),
217 [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
223 ERASEINFO(0x10000,8),
231 [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
237 ERASEINFO(0x10000, 8),
245 [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
251 ERASEINFO(0x10000, 8),
259 [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
265 ERASEINFO(0x10000, 8),
273 [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
279 ERASEINFO(0x10000, 8),
295 ERASEINFO(0x04000, 1),
296 ERASEINFO(0x02000, 2),
297 ERASEINFO(0x08000, 1),
298 ERASEINFO(0x10000, 7),
312 ERASEINFO(0x04000,1),
313 ERASEINFO(0x02000,2),
314 ERASEINFO(0x08000,1),
315 ERASEINFO(0x10000,7),
329 ERASEINFO(0x04000, 1),
330 ERASEINFO(0x02000, 2),
331 ERASEINFO(0x08000, 1),
332 ERASEINFO(0x10000, 15),
346 ERASEINFO(0x10000, 15),
347 ERASEINFO(0x08000, 1),
348 ERASEINFO(0x02000, 2),
349 ERASEINFO(0x04000, 1),
363 ERASEINFO(0x10000, 15),
364 ERASEINFO(0x08000, 1),
365 ERASEINFO(0x02000, 2),
366 ERASEINFO(0x04000, 1),
380 ERASEINFO(0x10000, 15),
381 ERASEINFO(0x08000, 1),
382 ERASEINFO(0x02000, 2),
383 ERASEINFO(0x04000, 1),
397 ERASEINFO(0x04000, 1),
398 ERASEINFO(0x02000, 2),
399 ERASEINFO(0x08000, 1),
400 ERASEINFO(0x10000, 7),
431 uaddr_idx = jedec_entry->uaddr[0]; in fill_info()
447 debug("unlock addresses are 0x%lx/0x%lx\n", in fill_info()
450 sect_cnt = 0; in fill_info()
451 total_size = 0; in fill_info()
452 for (i = 0; i < jedec_entry->NumEraseRegions; i++) { in fill_info()
454 ulong erase_region_count = (jedec_entry->regions[i] & 0xff) + 1; in fill_info()
459 for (j = 0; j < erase_region_count; j++) { in fill_info()
478 int ret = 0; in jedec_flash_match()
480 ulong mask = 0xFFFF; in jedec_flash_match()
482 mask = 0xFF; in jedec_flash_match()
484 for (i = 0; i < ARRAY_SIZE(jedec_table); i++) { in jedec_flash_match()