23 #define set_val(addr, val)	REG(addr) = (val)  macro
24 #define set_bit(addr, val)	set_val((addr), (get_val(addr) | (val)))
25 #define clear_bit(addr, val)	set_val((addr), (get_val(addr) & ~(val)))
39 	set_val(&regs->mmcclk, 0);  in dmmc_set_clock()
54 	set_val(&regs->mmcclk, (clkrt | MMCCLK_CLKEN));  in dmmc_set_clock()
167 	set_val(&regs->mmcim, 0);  in dmmc_send_cmd()
174 		set_val(&regs->mmcfifoctl,  in dmmc_send_cmd()
182 			set_val(&regs->mmcfifoctl, MMCFIFOCTL_FIFOLEV);  in dmmc_send_cmd()
184 			set_val(&regs->mmcfifoctl,  in dmmc_send_cmd()
190 		set_val(&regs->mmctod, 0xFFFF);  in dmmc_send_cmd()
191 		set_val(&regs->mmcnblk, (data->blocks & MMCNBLK_NBLK_MASK));  in dmmc_send_cmd()
192 		set_val(&regs->mmcblen, (data->blocksize & MMCBLEN_BLEN_MASK));  in dmmc_send_cmd()
200 				set_val(&regs->mmcdxr, val);  in dmmc_send_cmd()
206 		set_val(&regs->mmcblen, 0);  in dmmc_send_cmd()
207 		set_val(&regs->mmcnblk, 0);  in dmmc_send_cmd()
210 	set_val(&regs->mmctor, 0x1FFF);  in dmmc_send_cmd()
213 	set_val(&regs->mmcarghl, cmd->cmdarg);  in dmmc_send_cmd()
214 	set_val(&regs->mmccmd, cmddata);  in dmmc_send_cmd()
300 				set_val(&regs->mmcdxr, cmddata);  in dmmc_send_cmd()
333 	set_val(&regs->mmcclk, 0x0);  in dmmc_init()
334 	set_val(&regs->mmctor, 0x1FFF);  in dmmc_init()
335 	set_val(&regs->mmctod, 0xFFFF);  in dmmc_init()
344 	set_val(&regs->mmcfifoctl, (MMCFIFOCTL_FIFOLEV | MMCFIFOCTL_FIFORST));  in dmmc_init()
345 	set_val(&regs->mmcfifoctl, MMCFIFOCTL_FIFOLEV);  in dmmc_init()