Lines Matching +full:pins +full:- +full:are +full:- +full:numbered
5 * SPDX-License-Identifier: GPL-2.0+
10 *----------------------------------------------------------------------
12 * Sysgo Real-Time Solutions GmbH
13 * Klein-Winternheim, Germany
14 *----------------------------------------------------------------------
140 /* huh? write 0xf2 twice - a typo in rolo in ali512x_set_uart()
198 * there may be some mis-understandings burried in here.
199 * -- Daniel daniel@omicron.se)
201 * There are 22 CIO pins numbered
202 * 10-17
203 * 20-25
204 * 30-37
206 * 20-24 are dedicated CIO pins, the other 17 are muliplexed with
221 * CIO20 -
222 * CIO21 -
223 * CIO22 -
224 * CIO23 -
225 * CIO24 -
241 * The function selection registers are accessible under
246 * bit 1-0 CIO indirect registers port address select
252 * There are three CIO I/O register accessed via CIO index port and CIO data port
253 * 0x01 CIO 10-17 data
254 * 0x02 CIO 20-25 data (bits 7-6 unused)
255 * 0x03 CIO 30-37 data
266 * 7-4 Unused
316 /* set all pins to input to start with */ in ali512x_set_cio()
334 /* valid pins are 10-17, 20-25 and 30-37 */ in ali512x_cio_function()
393 /* valid pins are 10-17, 20-25 and 30-37 */ in ali512x_cio_in()