Lines Matching +full:non +full:- +full:secure +full:- +full:otp
62 bool "Rockchip e-fuse support"
65 Enable (read-only) access for the e-fuse block found in Rockchip
67 or through child-nodes that are generated based on the e-fuse map
75 bool "Rockchip OTP Support"
79 from otp, such as cpu-leakage.
85 This driver support Decompress IP built-in Rockchip SoC, support
92 This driver support Decompress IP built-in Rockchip SoC, support
96 bool "Rockchip Secure OTP Support"
99 Support read & write secure otp.
102 bool "Rockchip Secure OTP Support in spl"
105 Support read & write secure otp in spl.
111 Enable command-line access to the Chrome OS EC (Embedded
113 a number of sub-commands for performing EC tasks such as
149 keyboard (use the -l flag to enable the LCD), verified boot context,
158 ARM Chromebooks such as pit, pi and nyan-big. The SPI interface
166 integrated 64-byte EEPROM, four programmable non-volatile I/O pins
194 bool "Enable power-sequencing drivers"
197 Power-sequencing drivers provide support for controlling power for
203 bool "Enable power-sequencing drivers for SPL"
206 Power-sequencing drivers provide support for controlling power for
238 PMIC I2C bus, etc. This driver provides the core low-level
239 communication path by which feature-specific drivers (such as clock)
258 bool "Enable driver for generic I2C-attached EEPROMs"