Lines Matching refs:IRQ_REG_X32
22 #define IRQ_REG_X32(irq) (4 * ((irq) / 32)) macro
144 val = gicd_readl(GICD_ISENABLERn + IRQ_REG_X32(irq)); in gic_irq_enable()
146 gicd_writel(val, GICD_ISENABLERn + IRQ_REG_X32(irq)); in gic_irq_enable()
159 val = gicd_readl(GICD_ISENABLERn + IRQ_REG_X32(irq)); in gic_irq_enable()
161 gicd_writel(val, GICD_ISENABLERn + IRQ_REG_X32(irq)); in gic_irq_enable()
174 GICD_ICENABLERn + IRQ_REG_X32(irq)); in gic_irq_disable()
269 gicd_readl(GICD_IGROUPRn + IRQ_REG_X32(irq)); in gic_irq_suspend()
273 gicd_readl(GICD_ISPENDRn + IRQ_REG_X32(irq)); in gic_irq_suspend()
277 gicd_readl(GICD_ISENABLERn + IRQ_REG_X32(irq)); in gic_irq_suspend()
307 GICD_ICENABLERn + IRQ_REG_X32(irq)); in gic_irq_resume()
323 GICD_IGROUPRn + IRQ_REG_X32(irq)); in gic_irq_resume()
327 GICD_ISENABLERn + IRQ_REG_X32(irq)); in gic_irq_resume()
331 GICD_ISPENDRn + IRQ_REG_X32(irq)); in gic_irq_resume()