Lines Matching +full:dts +full:- +full:node
4 * SPDX-License-Identifier: GPL-2.0+
14 #include <irq-generic.h>
15 #include <irq-platform.h>
32 return priv->keycode; in rockchip_ir_get_keycode()
39 return priv->repeat; in rockchip_ir_get_repeat()
48 for (i = 0; i < priv->num; i++) { in ir_lookup_by_scancode()
52 for (j = 0; i < priv->num && j < rc_map[i].nbuttons; j++) { in ir_lookup_by_scancode()
54 if (priv->keycode == rc_map[i].scan[j].keycode) in ir_lookup_by_scancode()
55 priv->repeat++; in ir_lookup_by_scancode()
57 priv->repeat = 0; in ir_lookup_by_scancode()
58 priv->keycode = rc_map[i].scan[j].keycode; in ir_lookup_by_scancode()
63 priv->keycode = KEY_RESERVED; in ir_lookup_by_scancode()
64 priv->repeat = 0; in ir_lookup_by_scancode()
66 return -1; in ir_lookup_by_scancode()
75 ofnode node; in ir_parse_keys() local
78 dev_for_each_subnode(node, dev) { in ir_parse_keys()
79 ret = ofnode_read_u32(node, "rockchip,usercode", &val); in ir_parse_keys()
82 return -1; in ir_parse_keys()
86 debug("missing usercode property in the dts\n"); in ir_parse_keys()
87 return -1; in ir_parse_keys()
90 len = ofnode_read_size(node, "rockchip,key_table"); in ir_parse_keys()
95 ret = ofnode_read_u32_array(node, "rockchip,key_table", in ir_parse_keys()
98 debug("missing key_table property in the dts\n"); in ir_parse_keys()
99 return -1; in ir_parse_keys()
115 * ir_nec_decode() - Decode one NEC pulse or space
126 switch (data->state) { in ir_nec_decode()
128 if (!ev->pulse) in ir_nec_decode()
131 if (!eq_margin(ev->duration, NEC_HEADER_PULSE, NEC_UNIT * 2)) in ir_nec_decode()
134 data->count = 0; in ir_nec_decode()
135 data->state = STATE_HEADER_SPACE; in ir_nec_decode()
139 if (ev->pulse) in ir_nec_decode()
142 if (eq_margin(ev->duration, NEC_HEADER_SPACE, NEC_UNIT)) { in ir_nec_decode()
143 data->state = STATE_BIT_PULSE; in ir_nec_decode()
150 if (!ev->pulse) in ir_nec_decode()
153 if (!eq_margin(ev->duration, NEC_BIT_PULSE, NEC_UNIT / 2)) in ir_nec_decode()
156 data->state = STATE_BIT_SPACE; in ir_nec_decode()
160 if (ev->pulse) in ir_nec_decode()
163 data->bits <<= 1; in ir_nec_decode()
164 if (eq_margin(ev->duration, NEC_BIT_1_SPACE, NEC_UNIT / 2)) { in ir_nec_decode()
165 data->bits |= 1; in ir_nec_decode()
166 } else if (!eq_margin(ev->duration, NEC_BIT_0_SPACE, in ir_nec_decode()
170 data->count++; in ir_nec_decode()
172 if (data->count == NEC_NBITS) { in ir_nec_decode()
173 address = ((data->bits >> 24) & 0xff); in ir_nec_decode()
174 not_address = ((data->bits >> 16) & 0xff); in ir_nec_decode()
175 command = ((data->bits >> 8) & 0xff); in ir_nec_decode()
176 not_command = ((data->bits >> 0) & 0xff); in ir_nec_decode()
180 data->bits); in ir_nec_decode()
185 /* change to dts format */ in ir_nec_decode()
191 data->state = STATE_INACTIVE; in ir_nec_decode()
195 priv->keycode, priv->repeat); in ir_nec_decode()
199 data->state = STATE_BIT_PULSE; in ir_nec_decode()
206 data->count, data->state, TO_US(ev->duration), TO_STR(ev->pulse)); in ir_nec_decode()
207 data->state = STATE_INACTIVE; in ir_nec_decode()
209 return -1; in ir_nec_decode()
219 val = readl(priv->base + PWM_STA_REG(priv->id)); in rockchip_ir_irq()
220 cycle_hpr = readl(priv->base + PWM_HPR_REG); in rockchip_ir_irq()
221 cycle_lpr = readl(priv->base + PWM_LPR_REG); in rockchip_ir_irq()
222 if (val & PWM_CH_POL(priv->id)) { in rockchip_ir_irq()
229 writel(PWM_CH_INT(priv->id), in rockchip_ir_irq()
230 priv->base + PWM_STA_REG(priv->id)); in rockchip_ir_irq()
232 ev.duration = cycle * priv->period; in rockchip_ir_irq()
241 /* Enable capture mode, non-scaled clock, prescale 1 */ in rockchip_ir_hw_init()
242 writel(REG_CTL_MD, priv->base + PWM_CTL_REG); in rockchip_ir_hw_init()
245 writel(PWM_CH_INT(priv->id), in rockchip_ir_hw_init()
246 priv->base + PWM_STA_REG(priv->id)); in rockchip_ir_hw_init()
249 writel(PWM_CH_INT(priv->id), in rockchip_ir_hw_init()
250 priv->base + PWM_INT_REG(priv->id)); in rockchip_ir_hw_init()
253 tmp = readl(priv->base + PWM_CTL_REG); in rockchip_ir_hw_init()
254 writel(tmp | REG_CTL_EN, priv->base + PWM_CTL_REG); in rockchip_ir_hw_init()
259 ofnode node; in rockchip_ir_ofdata_to_platdata() local
265 dev_for_each_subnode(node, dev) { in rockchip_ir_ofdata_to_platdata()
266 ret = ofnode_read_u32(node, "rockchip,usercode", &val); in rockchip_ir_ofdata_to_platdata()
271 priv->num = subnode_num; in rockchip_ir_ofdata_to_platdata()
273 if (priv->num == 0) { in rockchip_ir_ofdata_to_platdata()
274 debug("no ir map in dts\n"); in rockchip_ir_ofdata_to_platdata()
275 return -1; in rockchip_ir_ofdata_to_platdata()
277 priv->base = dev_read_addr(dev); in rockchip_ir_ofdata_to_platdata()
278 priv->id = (priv->base >> 4) & 0xF; in rockchip_ir_ofdata_to_platdata()
290 rc_map = calloc(1, priv->num * sizeof(struct rc_map)); in rockchip_ir_probe()
293 return -EINVAL; in rockchip_ir_probe()
299 return -EINVAL; in rockchip_ir_probe()
302 * The PWM does not have decicated interrupt number in dts and can in rockchip_ir_probe()
308 return -EINVAL; in rockchip_ir_probe()
314 return -EINVAL; in rockchip_ir_probe()
316 priv->freq = clk_get_rate(&clk); in rockchip_ir_probe()
317 debug("%s pwm clk = %lu\n", __func__, priv->freq); in rockchip_ir_probe()
318 priv->period = 1000000000 / priv->freq; in rockchip_ir_probe()
335 { .compatible = "rockchip,remotectl-pwm" },