83 	struct zynq_i2c_registers *zynq_i2c = i2c_select(adap);  in zynq_i2c_init()  local
87 		(2 << ZYNQ_I2C_CONTROL_DIV_A_SHIFT), &zynq_i2c->control);  in zynq_i2c_init()
90 	setbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_MS |  in zynq_i2c_init()
95 static void zynq_i2c_debug_status(struct zynq_i2c_registers *zynq_i2c)  in zynq_i2c_debug_status()  argument
99 	int_status = readl(&zynq_i2c->interrupt_status);  in zynq_i2c_debug_status()
101 	status = readl(&zynq_i2c->status);  in zynq_i2c_debug_status()
130 		debug("TS%d ", readl(&zynq_i2c->transfer_size));  in zynq_i2c_debug_status()
137 static u32 zynq_i2c_wait(struct zynq_i2c_registers *zynq_i2c, u32 mask)  in zynq_i2c_wait()  argument
143 		int_status = readl(&zynq_i2c->interrupt_status);  in zynq_i2c_wait()
148 	zynq_i2c_debug_status(zynq_i2c);  in zynq_i2c_wait()
151 	writel(int_status & mask, &zynq_i2c->interrupt_status);  in zynq_i2c_wait()
162 	struct zynq_i2c_registers *zynq_i2c = i2c_select(adap);  in zynq_i2c_probe()  local
165 	setbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_CLR_FIFO |  in zynq_i2c_probe()
167 	clrbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_HOLD);  in zynq_i2c_probe()
168 	writel(0xFF, &zynq_i2c->interrupt_status);  in zynq_i2c_probe()
169 	writel(dev, &zynq_i2c->address);  in zynq_i2c_probe()
170 	writel(1, &zynq_i2c->transfer_size);  in zynq_i2c_probe()
172 	return (zynq_i2c_wait(zynq_i2c, ZYNQ_I2C_INTERRUPT_COMP |  in zynq_i2c_probe()
187 	struct zynq_i2c_registers *zynq_i2c = i2c_select(adap);  in zynq_i2c_read()  local
194 	setbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_CLR_FIFO |  in zynq_i2c_read()
200 	clrbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_HOLD);  in zynq_i2c_read()
201 	writel(0xFF, &zynq_i2c->interrupt_status);  in zynq_i2c_read()
203 		clrbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_RW);  in zynq_i2c_read()
204 		writel(dev, &zynq_i2c->address);  in zynq_i2c_read()
206 			writel(addr >> (8 * alen), &zynq_i2c->data);  in zynq_i2c_read()
209 		if (!zynq_i2c_wait(zynq_i2c, ZYNQ_I2C_INTERRUPT_COMP)) {  in zynq_i2c_read()
211 			clrbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_HOLD);  in zynq_i2c_read()
217 	setbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_CLR_FIFO |  in zynq_i2c_read()
220 	writel(dev, &zynq_i2c->address);  in zynq_i2c_read()
221 	writel(length, &zynq_i2c->transfer_size);  in zynq_i2c_read()
225 		status = zynq_i2c_wait(zynq_i2c, ZYNQ_I2C_INTERRUPT_COMP |  in zynq_i2c_read()
229 			clrbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_HOLD);  in zynq_i2c_read()
233 		      length - readl(&zynq_i2c->transfer_size));  in zynq_i2c_read()
234 		for (; i < length - readl(&zynq_i2c->transfer_size); i++)  in zynq_i2c_read()
235 			*(cur_data++) = readl(&zynq_i2c->data);  in zynq_i2c_read()
236 	} while (readl(&zynq_i2c->transfer_size) != 0);  in zynq_i2c_read()
238 	clrbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_HOLD);  in zynq_i2c_read()
241 	zynq_i2c_debug_status(zynq_i2c);  in zynq_i2c_read()
254 	struct zynq_i2c_registers *zynq_i2c = i2c_select(adap);  in zynq_i2c_write()  local
257 	setbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_CLR_FIFO |  in zynq_i2c_write()
259 	clrbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_RW);  in zynq_i2c_write()
260 	writel(0xFF, &zynq_i2c->interrupt_status);  in zynq_i2c_write()
261 	writel(dev, &zynq_i2c->address);  in zynq_i2c_write()
264 			writel(addr >> (8 * alen), &zynq_i2c->data);  in zynq_i2c_write()
266 		if (!zynq_i2c_wait(zynq_i2c, ZYNQ_I2C_INTERRUPT_COMP)) {  in zynq_i2c_write()
268 			clrbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_HOLD);  in zynq_i2c_write()
275 		writel(*(cur_data++), &zynq_i2c->data);  in zynq_i2c_write()
276 		if (readl(&zynq_i2c->transfer_size) == ZYNQ_I2C_FIFO_DEPTH) {  in zynq_i2c_write()
277 			if (!zynq_i2c_wait(zynq_i2c, ZYNQ_I2C_INTERRUPT_COMP)) {  in zynq_i2c_write()
279 				clrbits_le32(&zynq_i2c->control,  in zynq_i2c_write()
287 	clrbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_HOLD);  in zynq_i2c_write()
289 	if (!zynq_i2c_wait(zynq_i2c, ZYNQ_I2C_INTERRUPT_COMP))  in zynq_i2c_write()