35 			REG(&(i2c_base->i2c_con)) = 0;\
44 	REG(&(i2c_base->i2c_stat)) = 0xffff;  in _wait_for_bus()
47 		stat = REG(&(i2c_base->i2c_stat));  in _wait_for_bus()
49 			REG(&(i2c_base->i2c_stat)) = 0xffff;  in _wait_for_bus()
53 		REG(&(i2c_base->i2c_stat)) = stat;  in _wait_for_bus()
57 	REG(&(i2c_base->i2c_stat)) = 0xffff;  in _wait_for_bus()
67 		stat = REG(&(i2c_base->i2c_stat));  in _poll_i2c_irq()
72 	REG(&(i2c_base->i2c_stat)) = 0xffff;  in _poll_i2c_irq()
79 		if (!(REG(&(i2c_base->i2c_stat)) & I2C_STAT_RRDY))  in _flush_rx()
82 		REG(&(i2c_base->i2c_drr));  in _flush_rx()
83 		REG(&(i2c_base->i2c_stat)) = I2C_STAT_RRDY;  in _flush_rx()
96 	REG(&(i2c_base->i2c_psc)) = psc; /* 27MHz / (2 + 1) = 9MHz */  in _davinci_i2c_setspeed()
97 	REG(&(i2c_base->i2c_scll)) = (div * 50) / 100; /* 50% Duty */  in _davinci_i2c_setspeed()
98 	REG(&(i2c_base->i2c_sclh)) = div - REG(&(i2c_base->i2c_scll));  in _davinci_i2c_setspeed()
106 	if (REG(&(i2c_base->i2c_con)) & I2C_CON_EN) {  in _davinci_i2c_init()
107 		REG(&(i2c_base->i2c_con)) = 0;  in _davinci_i2c_init()
113 	REG(&(i2c_base->i2c_oa)) = slaveadd;  in _davinci_i2c_init()
114 	REG(&(i2c_base->i2c_cnt)) = 0;  in _davinci_i2c_init()
117 	REG(&(i2c_base->i2c_ie)) = I2C_IE_SCD_IE | I2C_IE_XRDY_IE |  in _davinci_i2c_init()
121 	REG(&(i2c_base->i2c_con)) = I2C_CON_EN;  in _davinci_i2c_init()
143 		REG(&(i2c_base->i2c_cnt)) = alen;  in _davinci_i2c_read()
144 		REG(&(i2c_base->i2c_sa)) = chip;  in _davinci_i2c_read()
145 		REG(&(i2c_base->i2c_con)) = tmp;  in _davinci_i2c_read()
155 				REG(&(i2c_base->i2c_dxr)) = (addr >> 8) & 0xff;  in _davinci_i2c_read()
157 				REG(&(i2c_base->i2c_con)) = 0;  in _davinci_i2c_read()
169 				REG(&(i2c_base->i2c_dxr)) = addr & 0xff;  in _davinci_i2c_read()
171 				REG(&(i2c_base->i2c_con)) = 0;  in _davinci_i2c_read()
181 				REG(&(i2c_base->i2c_con)) = 0;  in _davinci_i2c_read()
189 	REG(&(i2c_base->i2c_cnt)) = len & 0xffff;  in _davinci_i2c_read()
190 	REG(&(i2c_base->i2c_sa)) = chip;  in _davinci_i2c_read()
191 	REG(&(i2c_base->i2c_con)) = tmp;  in _davinci_i2c_read()
200 			buf[i] = REG(&(i2c_base->i2c_drr));  in _davinci_i2c_read()
202 			REG(&(i2c_base->i2c_con)) = 0;  in _davinci_i2c_read()
212 		REG(&(i2c_base->i2c_con)) = 0;  in _davinci_i2c_read()
217 	REG(&(i2c_base->i2c_stat)) = 0xffff;  in _davinci_i2c_read()
218 	REG(&(i2c_base->i2c_cnt)) = 0;  in _davinci_i2c_read()
219 	REG(&(i2c_base->i2c_con)) = 0;  in _davinci_i2c_read()
245 	REG(&(i2c_base->i2c_cnt)) = (alen == 0) ?  in _davinci_i2c_write()
247 	REG(&(i2c_base->i2c_sa)) = chip;  in _davinci_i2c_write()
248 	REG(&(i2c_base->i2c_con)) = tmp;  in _davinci_i2c_write()
258 			REG(&(i2c_base->i2c_dxr)) = (addr >> 8) & 0xff;  in _davinci_i2c_write()
260 			REG(&(i2c_base->i2c_con)) = 0;  in _davinci_i2c_write()
271 			REG(&(i2c_base->i2c_dxr)) = addr & 0xff;  in _davinci_i2c_write()
273 			REG(&(i2c_base->i2c_con)) = 0;  in _davinci_i2c_write()
284 			REG(&(i2c_base->i2c_dxr)) = buf[i];  in _davinci_i2c_write()
294 		REG(&(i2c_base->i2c_con)) = 0;  in _davinci_i2c_write()
299 	REG(&(i2c_base->i2c_stat)) = 0xffff;  in _davinci_i2c_write()
300 	REG(&(i2c_base->i2c_cnt)) = 0;  in _davinci_i2c_write()
301 	REG(&(i2c_base->i2c_con)) = 0;  in _davinci_i2c_write()
310 	if (chip == REG(&(i2c_base->i2c_oa)))  in _davinci_i2c_probe_chip()
313 	REG(&(i2c_base->i2c_con)) = 0;  in _davinci_i2c_probe_chip()
318 	REG(&(i2c_base->i2c_cnt)) = 1;  in _davinci_i2c_probe_chip()
319 	REG(&(i2c_base->i2c_sa))  = chip;  in _davinci_i2c_probe_chip()
320 	REG(&(i2c_base->i2c_con)) = (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT |  in _davinci_i2c_probe_chip()
324 	if (!(REG(&(i2c_base->i2c_stat)) & I2C_STAT_NACK)) {  in _davinci_i2c_probe_chip()
327 		REG(&(i2c_base->i2c_stat)) = 0xffff;  in _davinci_i2c_probe_chip()
329 		REG(&(i2c_base->i2c_stat)) = 0xffff;  in _davinci_i2c_probe_chip()
330 		REG(&(i2c_base->i2c_con)) |= I2C_CON_STP;  in _davinci_i2c_probe_chip()
337 	REG(&(i2c_base->i2c_stat)) = 0xffff;  in _davinci_i2c_probe_chip()
338 	REG(&(i2c_base->i2c_cnt)) = 0;  in _davinci_i2c_probe_chip()