Lines Matching refs:bank_num
164 unsigned int *bank_num, in zynq_gpio_get_bank_pin() argument
174 *bank_num = bank; in zynq_gpio_get_bank_pin()
183 *bank_num = 0; in zynq_gpio_get_bank_pin()
207 unsigned int bank_num, bank_pin_num; in zynq_gpio_get_value() local
213 zynq_gpio_get_bank_pin(gpio, &bank_num, &bank_pin_num, dev); in zynq_gpio_get_value()
216 ZYNQ_GPIO_DATA_RO_OFFSET(bank_num)); in zynq_gpio_get_value()
223 unsigned int reg_offset, bank_num, bank_pin_num; in zynq_gpio_set_value() local
229 zynq_gpio_get_bank_pin(gpio, &bank_num, &bank_pin_num, dev); in zynq_gpio_set_value()
234 reg_offset = ZYNQ_GPIO_DATA_MSW_OFFSET(bank_num); in zynq_gpio_set_value()
236 reg_offset = ZYNQ_GPIO_DATA_LSW_OFFSET(bank_num); in zynq_gpio_set_value()
255 unsigned int bank_num, bank_pin_num; in zynq_gpio_direction_input() local
261 zynq_gpio_get_bank_pin(gpio, &bank_num, &bank_pin_num, dev); in zynq_gpio_direction_input()
264 if (bank_num == 0 && (bank_pin_num == 7 || bank_pin_num == 8)) in zynq_gpio_direction_input()
268 reg = readl(priv->base + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); in zynq_gpio_direction_input()
270 writel(reg, priv->base + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); in zynq_gpio_direction_input()
279 unsigned int bank_num, bank_pin_num; in zynq_gpio_direction_output() local
285 zynq_gpio_get_bank_pin(gpio, &bank_num, &bank_pin_num, dev); in zynq_gpio_direction_output()
288 reg = readl(priv->base + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); in zynq_gpio_direction_output()
290 writel(reg, priv->base + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); in zynq_gpio_direction_output()
293 reg = readl(priv->base + ZYNQ_GPIO_OUTEN_OFFSET(bank_num)); in zynq_gpio_direction_output()
295 writel(reg, priv->base + ZYNQ_GPIO_OUTEN_OFFSET(bank_num)); in zynq_gpio_direction_output()
305 unsigned int bank_num, bank_pin_num; in zynq_gpio_get_function() local
311 zynq_gpio_get_bank_pin(offset, &bank_num, &bank_pin_num, dev); in zynq_gpio_get_function()
314 reg = readl(priv->base + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); in zynq_gpio_get_function()