Lines Matching full:bank

36 /* Platform data for each bank */
38 struct s5p_gpio_bank *bank; member
42 /* Information about each bank at run-time */
44 struct s5p_gpio_bank *bank; member
60 struct s5p_gpio_bank *bank; in s5p_gpio_get_bank() local
61 bank = (struct s5p_gpio_bank *)data->reg_addr; in s5p_gpio_get_bank()
62 bank += (gpio - upto) / GPIO_PER_BANK; in s5p_gpio_get_bank()
63 debug("gpio=%d, bank=%p\n", gpio, bank); in s5p_gpio_get_bank()
64 return bank; in s5p_gpio_get_bank()
74 static void s5p_gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg) in s5p_gpio_cfg_pin() argument
78 value = readl(&bank->con); in s5p_gpio_cfg_pin()
81 writel(value, &bank->con); in s5p_gpio_cfg_pin()
84 static void s5p_gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en) in s5p_gpio_set_value() argument
88 value = readl(&bank->dat); in s5p_gpio_set_value()
92 writel(value, &bank->dat); in s5p_gpio_set_value()
105 static int s5p_gpio_get_cfg_pin(struct s5p_gpio_bank *bank, int gpio) in s5p_gpio_get_cfg_pin() argument
109 value = readl(&bank->con); in s5p_gpio_get_cfg_pin()
114 static unsigned int s5p_gpio_get_value(struct s5p_gpio_bank *bank, int gpio) in s5p_gpio_get_value() argument
118 value = readl(&bank->dat); in s5p_gpio_get_value()
123 static void s5p_gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode) in s5p_gpio_set_pull() argument
127 value = readl(&bank->pull); in s5p_gpio_set_pull()
139 writel(value, &bank->pull); in s5p_gpio_set_pull()
142 static void s5p_gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode) in s5p_gpio_set_drv() argument
146 value = readl(&bank->drv); in s5p_gpio_set_drv()
160 writel(value, &bank->drv); in s5p_gpio_set_drv()
163 static void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode) in s5p_gpio_set_rate() argument
167 value = readl(&bank->drv); in s5p_gpio_set_rate()
179 writel(value, &bank->drv); in s5p_gpio_set_rate()
195 s5p_gpio_cfg_pin(state->bank, offset, S5P_GPIO_INPUT); in exynos_gpio_direction_input()
207 s5p_gpio_set_value(state->bank, offset, value); in exynos_gpio_direction_output()
210 s5p_gpio_cfg_pin(state->bank, offset, S5P_GPIO_OUTPUT); in exynos_gpio_direction_output()
220 return s5p_gpio_get_value(state->bank, offset); in exynos_gpio_get_value()
229 s5p_gpio_set_value(state->bank, offset, value); in exynos_gpio_set_value()
269 cfg = s5p_gpio_get_cfg_pin(state->bank, offset); in exynos_gpio_get_function()
296 priv->bank = plat->bank; in gpio_exynos_probe()
306 * device for each Exynos GPIO bank.
311 struct s5p_gpio_bank *bank, *base; in gpio_exynos_bind() local
320 for (node = fdt_first_subnode(blob, dev_of_offset(parent)), bank = base; in gpio_exynos_bind()
322 node = fdt_next_subnode(blob, node), bank++) { in gpio_exynos_bind()
344 bank = (struct s5p_gpio_bank *)((ulong)base + reg); in gpio_exynos_bind()
346 plat->bank = bank; in gpio_exynos_bind()
348 debug("dev at %p: %s\n", bank, plat->bank_name); in gpio_exynos_bind()