Lines Matching +full:apb +full:- +full:base
4 * DesignWare APB GPIO driver
6 * SPDX-License-Identifier: GPL-2.0+
15 #include <dm/device-internal.h>
37 fdt_addr_t base; member
44 clrbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin); in dwapb_gpio_direction_input()
53 setbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin); in dwapb_gpio_direction_output()
56 setbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin); in dwapb_gpio_direction_output()
58 clrbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin); in dwapb_gpio_direction_output()
66 return !!(readl(plat->base + GPIO_EXT_PORT(plat->bank)) & (1 << pin)); in dwapb_gpio_get_value()
75 setbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin); in dwapb_gpio_set_value()
77 clrbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin); in dwapb_gpio_set_value()
92 struct gpio_dwapb_platdata *plat = dev->platdata; in gpio_dwapb_probe()
97 priv->gpio_count = plat->pins; in gpio_dwapb_probe()
98 priv->bank_name = plat->name; in gpio_dwapb_probe()
106 const void *blob = gd->fdt_blob; in gpio_dwapb_bind()
108 fdt_addr_t base; in gpio_dwapb_bind() local
115 base = fdtdec_get_addr(blob, dev_of_offset(dev), "reg"); in gpio_dwapb_bind()
116 if (base == FDT_ADDR_T_NONE) { in gpio_dwapb_bind()
117 debug("Can't get the GPIO register base address\n"); in gpio_dwapb_bind()
118 return -ENXIO; in gpio_dwapb_bind()
124 if (!fdtdec_get_bool(blob, node, "gpio-controller")) in gpio_dwapb_bind()
130 return -ENOMEM; in gpio_dwapb_bind()
132 plat->base = base; in gpio_dwapb_bind()
133 plat->bank = bank; in gpio_dwapb_bind()
134 plat->pins = fdtdec_get_int(blob, node, "snps,nr-gpios", 0); in gpio_dwapb_bind()
135 plat->name = fdt_stringlist_get(blob, node, "bank-name", 0, in gpio_dwapb_bind()
140 ret = device_bind(dev, dev->driver, plat->name, in gpio_dwapb_bind()
141 plat, -1, &subdev); in gpio_dwapb_bind()
157 { .compatible = "snps,dw-apb-gpio" },
162 .name = "gpio-dwapb",