drivers/gpio/at91_gpio.c

8  * SPDX-License-Identifier:	GPL-2.0+
17 #include <asm/gpio.h>
53 		writel(mask, &at91_port->puer);  in at91_set_port_pullup()
55 		writel(mask, &at91_port->pudr);  in at91_set_port_pullup()
56 	writel(mask, &at91_port->per);  in at91_set_port_pullup()
70  * mux the pin to the "GPIO" peripheral role.
79 		writel(mask, &at91_port->idr);  in at91_set_pio_periph()
81 		writel(mask, &at91_port->per);  in at91_set_pio_periph()
88  * mux the pin to the "A" internal peripheral role.
97 		writel(mask, &at91_port->idr);  in at91_set_a_periph()
99 		writel(mask, &at91_port->mux.pio2.asr);  in at91_set_a_periph()
100 		writel(mask, &at91_port->pdr);  in at91_set_a_periph()
107  * mux the pin to the "B" internal peripheral role.
116 		writel(mask, &at91_port->idr);  in at91_set_b_periph()
118 		writel(mask, &at91_port->mux.pio2.bsr);  in at91_set_b_periph()
119 		writel(mask, &at91_port->pdr);  in at91_set_b_periph()
126  * mux the pin to the "A" internal peripheral role.
135 		writel(mask, &at91_port->idr);  in at91_pio3_set_a_periph()
137 		writel(readl(&at91_port->mux.pio3.abcdsr1) & ~mask,  in at91_pio3_set_a_periph()
138 		       &at91_port->mux.pio3.abcdsr1);  in at91_pio3_set_a_periph()
139 		writel(readl(&at91_port->mux.pio3.abcdsr2) & ~mask,  in at91_pio3_set_a_periph()
140 		       &at91_port->mux.pio3.abcdsr2);  in at91_pio3_set_a_periph()
142 		writel(mask, &at91_port->pdr);  in at91_pio3_set_a_periph()
149  * mux the pin to the "B" internal peripheral role.
158 		writel(mask, &at91_port->idr);  in at91_pio3_set_b_periph()
160 		writel(readl(&at91_port->mux.pio3.abcdsr1) | mask,  in at91_pio3_set_b_periph()
161 		       &at91_port->mux.pio3.abcdsr1);  in at91_pio3_set_b_periph()
162 		writel(readl(&at91_port->mux.pio3.abcdsr2) & ~mask,  in at91_pio3_set_b_periph()
163 		       &at91_port->mux.pio3.abcdsr2);  in at91_pio3_set_b_periph()
165 		writel(mask, &at91_port->pdr);  in at91_pio3_set_b_periph()
171  * mux the pin to the "C" internal peripheral role.
180 		writel(mask, &at91_port->idr);  in at91_pio3_set_c_periph()
182 		writel(readl(&at91_port->mux.pio3.abcdsr1) & ~mask,  in at91_pio3_set_c_periph()
183 		       &at91_port->mux.pio3.abcdsr1);  in at91_pio3_set_c_periph()
184 		writel(readl(&at91_port->mux.pio3.abcdsr2) | mask,  in at91_pio3_set_c_periph()
185 		       &at91_port->mux.pio3.abcdsr2);  in at91_pio3_set_c_periph()
186 		writel(mask, &at91_port->pdr);  in at91_pio3_set_c_periph()
193  * mux the pin to the "D" internal peripheral role.
202 		writel(mask, &at91_port->idr);  in at91_pio3_set_d_periph()
204 		writel(readl(&at91_port->mux.pio3.abcdsr1) | mask,  in at91_pio3_set_d_periph()
205 		       &at91_port->mux.pio3.abcdsr1);  in at91_pio3_set_d_periph()
206 		writel(readl(&at91_port->mux.pio3.abcdsr2) | mask,  in at91_pio3_set_d_periph()
207 		       &at91_port->mux.pio3.abcdsr2);  in at91_pio3_set_d_periph()
208 		writel(mask, &at91_port->pdr);  in at91_pio3_set_d_periph()
220 	val = readl(&at91_port->osr);  in at91_get_port_output()
231 	writel(mask, &at91_port->idr);  in at91_set_port_input()
233 	writel(mask, &at91_port->odr);  in at91_set_port_input()
234 	writel(mask, &at91_port->per);  in at91_set_port_input()
238  * mux the pin to the gpio controller (instead of "A" or "B" peripheral), and
257 	writel(mask, &at91_port->idr);  in at91_set_port_output()
258 	writel(mask, &at91_port->pudr);  in at91_set_port_output()
260 		writel(mask, &at91_port->sodr);  in at91_set_port_output()
262 		writel(mask, &at91_port->codr);  in at91_set_port_output()
263 	writel(mask, &at91_port->oer);  in at91_set_port_output()
264 	writel(mask, &at91_port->per);  in at91_set_port_output()
268  * mux the pin to the gpio controller (instead of "A" or "B" peripheral),
292 			writel(mask, &at91_port->ifer);  in at91_set_pio_deglitch()
294 			writel(mask, &at91_port->ifdr);  in at91_set_pio_deglitch()
311 			writel(mask, &at91_port->mux.pio3.ifscdr);  in at91_pio3_set_pio_deglitch()
312 			writel(mask, &at91_port->ifer);  in at91_pio3_set_pio_deglitch()
314 			writel(mask, &at91_port->ifdr);  in at91_pio3_set_pio_deglitch()
332 			writel(mask, &at91_port->mux.pio3.ifscer);  in at91_pio3_set_pio_debounce()
333 			writel(div & PIO_SCDR_DIV, &at91_port->mux.pio3.scdr);  in at91_pio3_set_pio_debounce()
334 			writel(mask, &at91_port->ifer);  in at91_pio3_set_pio_debounce()
336 			writel(mask, &at91_port->ifdr);  in at91_pio3_set_pio_debounce()
344  * enable/disable the pull-down.
345  * If pull-up already enabled while calling the function, we disable it.
356 			writel(mask, &at91_port->mux.pio3.ppder);  in at91_pio3_set_pio_pulldown()
358 			writel(mask, &at91_port->mux.pio3.ppddr);  in at91_pio3_set_pio_pulldown()
387 		writel(readl(&at91_port->schmitt) | mask,  in at91_pio3_set_pio_disable_schmitt_trig()
388 		       &at91_port->schmitt);  in at91_pio3_set_pio_disable_schmitt_trig()
395  * enable/disable the multi-driver. This is only valid for output and
406 			writel(mask, &at91_port->mder);  in at91_set_pio_multi_drive()
408 			writel(mask, &at91_port->mddr);  in at91_set_pio_multi_drive()
421 		writel(mask, &at91_port->sodr);  in at91_set_port_value()
423 		writel(mask, &at91_port->codr);  in at91_set_port_value()
427  * assuming the pin is muxed as a gpio output, set its value.
444 	pdsr = readl(&at91_port->pdsr) & mask;  in at91_get_port_value()
449  * read the pin's value (works even if it's not muxed as a gpio).
462 /* Common GPIO API */
464 int gpio_request(unsigned gpio, const char *label)  in gpio_request()  argument
469 int gpio_free(unsigned gpio)  in gpio_free()  argument
474 int gpio_direction_input(unsigned gpio)  in gpio_direction_input()  argument
476 	at91_set_pio_input(at91_gpio_to_port(gpio),  in gpio_direction_input()
477 			   at91_gpio_to_pin(gpio), 0);  in gpio_direction_input()
481 int gpio_direction_output(unsigned gpio, int value)  in gpio_direction_output()  argument
483 	at91_set_pio_output(at91_gpio_to_port(gpio),  in gpio_direction_output()
484 			    at91_gpio_to_pin(gpio), value);  in gpio_direction_output()
488 int gpio_get_value(unsigned gpio)  in gpio_get_value()  argument
490 	return at91_get_pio_value(at91_gpio_to_port(gpio),  in gpio_get_value()
491 				  at91_gpio_to_pin(gpio));  in gpio_get_value()
494 int gpio_set_value(unsigned gpio, int value)  in gpio_set_value()  argument
496 	at91_set_pio_value(at91_gpio_to_port(gpio),  in gpio_set_value()
497 			   at91_gpio_to_pin(gpio), value);  in gpio_set_value()
509 /* set GPIO pin 'gpio' as an input */
514 	at91_set_port_input(port->regs, offset, 0);  in at91_gpio_direction_input()
519 /* set GPIO pin 'gpio' as an output, with polarity 'value' */
525 	at91_set_port_output(port->regs, offset, value);  in at91_gpio_direction_output()
530 /* read GPIO IN value of pin 'gpio' */
535 	return at91_get_port_value(port->regs, offset);  in at91_gpio_get_value()
538 /* write GPIO OUT value to pin 'gpio' */
544 	at91_set_port_value(port->regs, offset, value);  in at91_gpio_set_value()
554 	if (at91_get_port_output(port->regs, offset))  in at91_gpio_get_function()
586 	uc_priv->bank_name = plat->bank_name;  in at91_gpio_probe()
587 	uc_priv->gpio_count = GPIO_PER_BANK;  in at91_gpio_probe()
590 	plat->base_addr = (uint32_t)devfdt_get_addr_ptr(dev);  in at91_gpio_probe()
592 	port->regs = (struct at91_port *)plat->base_addr;  in at91_gpio_probe()
599 	{ .compatible = "atmel,at91rm9200-gpio" },