19 #define EDMA3_SL_BASE(slot)			(0x4000 + ((slot) << 5))  argument
62 	qchmap = ((EDMA3_CHMAP_PARSET_MASK & cfg->slot)  in qedma3_start()
88 void edma3_set_dest(u32 base, int slot, u32 dst, enum edma3_address_mode mode,  in edma3_set_dest()  argument
94 	rg = (struct edma3_slot_layout *)(base + EDMA3_SL_BASE(slot));  in edma3_set_dest()
119 void edma3_set_dest_index(u32 base, unsigned slot, int bidx, int cidx)  in edma3_set_dest_index()  argument
125 	rg = (struct edma3_slot_layout *)(base + EDMA3_SL_BASE(slot));  in edma3_set_dest_index()
139 void edma3_set_dest_addr(u32 base, int slot, u32 dst)  in edma3_set_dest_addr()  argument
143 	rg = (struct edma3_slot_layout *)(base + EDMA3_SL_BASE(slot));  in edma3_set_dest_addr()
159 void edma3_set_src(u32 base, int slot, u32 src, enum edma3_address_mode mode,  in edma3_set_src()  argument
165 	rg = (struct edma3_slot_layout *)(base + EDMA3_SL_BASE(slot));  in edma3_set_src()
190 void edma3_set_src_index(u32 base, unsigned slot, int bidx, int cidx)  in edma3_set_src_index()  argument
196 	rg = (struct edma3_slot_layout *)(base + EDMA3_SL_BASE(slot));  in edma3_set_src_index()
210 void edma3_set_src_addr(u32 base, int slot, u32 src)  in edma3_set_src_addr()  argument
214 	rg = (struct edma3_slot_layout *)(base + EDMA3_SL_BASE(slot));  in edma3_set_src_addr()
248 void edma3_set_transfer_params(u32 base, int slot, int acnt,  in edma3_set_transfer_params()  argument
256 	rg = (struct edma3_slot_layout *)(base + EDMA3_SL_BASE(slot));  in edma3_set_transfer_params()
285 void edma3_write_slot(u32 base, int slot, struct edma3_slot_layout *param)  in edma3_write_slot()  argument
289 	u32 *addr = (u32 *)(base + EDMA3_SL_BASE(slot));  in edma3_write_slot()
304 void edma3_read_slot(u32 base, int slot, struct edma3_slot_layout *param)  in edma3_read_slot()  argument
308 	u32 *addr = (u32 *)(base + EDMA3_SL_BASE(slot));  in edma3_read_slot()
314 void edma3_slot_configure(u32 base, int slot, struct edma3_slot_config *cfg)  in edma3_slot_configure()  argument
318 	rg = (struct edma3_slot_layout *)(base + EDMA3_SL_BASE(slot));  in edma3_slot_configure()
396 	struct edma3_slot_config        slot;  in __edma3_transfer()  local
410 	slot.opt        = 0;  in __edma3_transfer()
411 	slot.src        = ((unsigned int) src);  in __edma3_transfer()
412 	slot.acnt       = a_cnt_value;  in __edma3_transfer()
413 	slot.bcnt       = b_cnt_value;  in __edma3_transfer()
414 	slot.ccnt       = 1;  in __edma3_transfer()
415 	slot.src_bidx   = a_cnt_value;  in __edma3_transfer()
416 	slot.dst_bidx   = a_cnt_value;  in __edma3_transfer()
417 	slot.src_cidx   = 0;  in __edma3_transfer()
418 	slot.dst_cidx   = 0;  in __edma3_transfer()
419 	slot.link       = EDMA3_PARSET_NULL_LINK;  in __edma3_transfer()
420 	slot.bcntrld    = 0;  in __edma3_transfer()
421 	slot.opt        = EDMA3_SLOPT_TRANS_COMP_INT_ENB |  in __edma3_transfer()
425 	edma3_slot_configure(edma3_base_addr, edma_slot_num, &slot);  in __edma3_transfer()
426 	edma_channel.slot = edma_slot_num;  in __edma3_transfer()
433 	edma3_set_dest_addr(edma3_base_addr, edma_channel.slot, addr);  in __edma3_transfer()
440 		slot.opt        = 0;  in __edma3_transfer()
441 		slot.src        =  in __edma3_transfer()
443 		slot.acnt       = rem_bytes;  in __edma3_transfer()
444 		slot.bcnt       = 1;  in __edma3_transfer()
445 		slot.ccnt       = 1;  in __edma3_transfer()
446 		slot.src_bidx   = rem_bytes;  in __edma3_transfer()
447 		slot.dst_bidx   = rem_bytes;  in __edma3_transfer()
448 		slot.src_cidx   = 0;  in __edma3_transfer()
449 		slot.dst_cidx   = 0;  in __edma3_transfer()
450 		slot.link       = EDMA3_PARSET_NULL_LINK;  in __edma3_transfer()
451 		slot.bcntrld    = 0;  in __edma3_transfer()
452 		slot.opt        = EDMA3_SLOPT_TRANS_COMP_INT_ENB |  in __edma3_transfer()
455 		edma3_slot_configure(edma3_base_addr, edma_slot_num, &slot);  in __edma3_transfer()
456 		edma_channel.slot = edma_slot_num;  in __edma3_transfer()
463 		edma3_set_dest_addr(edma3_base_addr, edma_channel.slot, addr +  in __edma3_transfer()