36 static struct qm_config *qm_cfg;  variable
54 	qm_cfg = cfg;  in _qm_init()
56 	qm_cfg->mngr_cfg->link_ram_base0	= qm_cfg->i_lram;  in _qm_init()
57 	qm_cfg->mngr_cfg->link_ram_size0	= HDESC_NUM * 8 - 1;  in _qm_init()
58 	qm_cfg->mngr_cfg->link_ram_base1	= 0;  in _qm_init()
59 	qm_cfg->mngr_cfg->link_ram_size1	= 0;  in _qm_init()
60 	qm_cfg->mngr_cfg->link_ram_base2	= 0;  in _qm_init()
62 	qm_cfg->desc_mem[0].base_addr = (u32)desc_pool;  in _qm_init()
63 	qm_cfg->desc_mem[0].start_idx = 0;  in _qm_init()
64 	qm_cfg->desc_mem[0].desc_reg_size =  in _qm_init()
70 		qm_push(&desc_pool[j], qm_cfg->qpool_num);  in _qm_init()
84 	queue_close(qm_cfg->qpool_num);  in qm_close()
86 	qm_cfg->mngr_cfg->link_ram_base0	= 0;  in qm_close()
87 	qm_cfg->mngr_cfg->link_ram_size0	= 0;  in qm_close()
88 	qm_cfg->mngr_cfg->link_ram_base1	= 0;  in qm_close()
89 	qm_cfg->mngr_cfg->link_ram_size1	= 0;  in qm_close()
90 	qm_cfg->mngr_cfg->link_ram_base2	= 0;  in qm_close()
92 	for (j = 0; j < qm_cfg->region_num; j++) {  in qm_close()
93 		qm_cfg->desc_mem[j].base_addr = 0;  in qm_close()
94 		qm_cfg->desc_mem[j].start_idx = 0;  in qm_close()
95 		qm_cfg->desc_mem[j].desc_reg_size = 0;  in qm_close()
98 	qm_cfg = NULL;  in qm_close()
107 	writel(regd, &qm_cfg->queue[qnum].ptr_size_thresh);  in qm_push()
124 	uhd = readl(&qm_cfg->queue[qnum].ptr_size_thresh) & ~0xf;  in qm_pop()
133 	return qm_pop(qm_cfg->qpool_num);  in qm_pop_from_free_pool()
211 	    rx_buffers->buff_ptr == NULL || qm_cfg == NULL)  in ksnav_init()
220 		hd = qm_pop(qm_cfg->qpool_num);  in ksnav_init()
285 	hd = qm_pop(qm_cfg->qpool_num);  in ksnav_send()
291 	hd->packet_info = qm_cfg->qpool_num;  in ksnav_send()